Crises In The Semiconductor Industry

I am on my way to Japan and I have just finished to read an excellent book and in my opinion a "must have" for any marketer and executive in the EDA and the semiconductor industries. The book is called "Chips and Change - How Crisis Reshapes the Semiconductor Industry" by Clair Brown and Greg Linden.

If you are new to this industry, it will help you to understand the history of the semiconductor companies, the challenges they faced and the revolutionary changes, they had to go through in the last generation. Obviously the EDA industry was heavily influenced by these changes as well. If you are industry veteran like me, it will help you to arrange your thoughts and get observation about the changes you have seen (but may not think about) in the last few decades.

The book describes 8 crises happened in the last 30 years and their impact on the leading semiconductor companies and the US economy. The book reminds us that our important industry (the EDA industry) serves $250B while we harvest only 1%-2% of this revenue.

The book goes through a thorough analysis of the globalization that started in manufacturing and continued with the design portion however at the end paints a conclusion that this trend does not really change the competitive map since many of the semiconductor companies have globalized themselves as well and therefore maintained their competitive advantage.

The chapter that was most interesting to me was chapter 3 which covers the crisis around the rising cost of design. The chip becomes the system with SoC cost rising from $7.6B in 1997 to $46B in 2005 (20% of the total chip revenue) to the point, you need to get a return of $400M sales in order to justify $20M SoC investment.

The key design cost components as described by the book are:

1. Hardware/Software co-design with increased cost of 1081% over the last four process generation
2. Software cost with SoC (HW/SW) integration as the most critical issue with increased cost of 375% in the same period.
3. Validation with 90% increased cost at the same period.

As written in the book, the industry is trying to solve this problem in multiple ways. Two of them are emerging methodologies:

• Reusable IP - the need to create or acquire IP that can be integrated and re-used quickly by the customers as they migrate from one design to another was described as the key issue being faced by designers today. I was excited to hear about this topic since Cadence addresses this issue already today by focusing on a TLM-driven design and verification methodology with emphasis on IP reuse. Cadence is also working on other solutions that will help customers to integrate IPs into their SoC quickly.  Stay tuned!

• System-level design approach - by moving to ESL, the industry can potentially reduce the cost of development. Although the book mentioned that this is a long journey that has started at the end of the 90's, it recognized the fact that this approach has a lot of merit. There were two reasons the book mentioned, the adoption for this method is not fast enough.   A) This approach was used in the past mostly for modeling and HW/SW validation without wide adoption in the connection to implementation - again, this is 100% in line with Cadence approach.  B) Designers are always pressured by the next deadline and therefore do not have the time to learn new technologies. We (the EDA vendors) need to continue to invest in education of the market and showing the productivity improvement the leading customers are getting. 

I would like to hear your opinion as well and if you liked what you read above, I recommend you to buy the book and read more details in this chapter and the other 7 interesting chapters.

Ran Avinun