DAC 2013 – System Design on Monday, June 3rd

The first day of DAC starts off today with four great presentations on system design at our DAC Theatre. Freescale will present on their use of FPGA-based prototyping, AMD will show their enhanced use of Palladium together with TLM models, ARM will present their model and debug connections to all System Development Suite (SDS) engines, and Broadcom will round up today's SD-related presentations outlining their use of Palladium with advanced embedded testbenches.

Freescale will kick it off at 9:30am with a presentation titled "Implementation of a Multi-threaded 64-bit Power Architecture Core on the RPP, FPGA-based Prototyping System". They will outline the advantages of using Palladium Emulation in conjunction with FPGA-based prototyping. While emulation on Palladium offers easier bring up, better hardware debug, and higher capacity of gates, memories, etc., using RPP FPGA-based prototyping is about 10X faster and more accessible to software developers at lower cost. They will describe the build of the e6500 PPC core on RPP. As a result, they were able to quickly run CoreMark and many other benchmarks for performance validation and were able to get performance metrics via the Nexus trace through the external DDR memory interface. For benchmarking, they rebuilt design changes for performance in about a day or two, and completed and tested software/compiler optimizations for benchmarks within minutes.

That's quite a set of results, showing nicely the different sweet spots for emulation and FPGA-based prototyping. While FPGA-based prototyping is great for software development, our Palladium XP offers 2.5X faster turnaround time for isolating and debugging compared to its nearest competitor, helping to remove those bugs in the critical path of customer schedules.

AMD will talk at 12:30pm about "Complementing In-Circuit Emulation with Virtualization for Improved Efficiency, Debug Productivity and Performance". They consider the benefits of emulation to be growing by the day, with users looking to emulation and other technologies to improve their productivity. To meet the new challenges, new complementary usage models for emulation are emerging and AMD will specifically talk about hybrid emulation with virtual platforms and embedding devices inside emulators using accelerated VIP. With those hybrids, AMD was able to improve application-level performance compared to traditional emulation by factors of 2X-20X and experience improved software debug using Virtual Platform debuggers.

At 2:00pm, ARM will present on "Accelerating Your Time to Market with ARM Software Development Tools and the Cadence System Development Suite". The presentation will center around how both ARM Fast Models for processors and interconnect can be used together with the SDS engines for actual execution, as well as how the Development Studio 5 (DS-5) connects to Virtual Prototyping, Palladium XP, and RPP FPGA-based prototyping for software debug. The following graph depicts the connections.

Finally, at 2:30pm, Broadcom will talk about "Faster System Bring-up with an Embedded Testbench on Palladium". They will introduce the challenges for firmware and hardware pre-silicon co-development, including "Pre-Silicon SoC Level Verification" with complicated and long duration firmware algorithms and concurrent operations; "Pre-Silicon Hardware and Software Co-Debug" with functional block configuration, fluid hardware interface (register bit-field) definitions, peripheral devices coexistence  and correct clock ratios; "Pre-Silicon Performance Measurement", "Pre-Silicon Device Driver Development"; and "Pre-Silicon Power Management Verification".  As for their approach on Palladium, they will describe a fully synthesizable testbench with firmware-controlled peripheral models capable of behaving like the actual device (PID, VID, transfer size, and buffer size) for camera, LCD, SIM, etc. Their results were nothing short of fantastic - they experienced the fastest SoC bring-up ever, were able to provide development platforms to software teams, and found critical system integration bugs.

This is shapig up to be quite an exciting day for system design at DAC. It is always great to see real users show real experiences - see you at our DAC Theatre!