• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. Verification
  3. System Realization Alliance -- An Industry Collaboratio…
Steve Brown
Steve Brown

Community Member

Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
TLM
system realization
EDA360
HLS
ESL
verification

System Realization Alliance -- An Industry Collaboration

21 Jul 2010 • 1 minute read

System Realization is a very broad topic. It encompasses all aspects of system design, from chips to chassis. In particular, innovations in software are driving changes in the value chain, as highlighted in the EDA360 industry vision document. In order to foster industry innovation and ease customer adoption challenges, Cadence is collaborating with a collection of tool, IP, service and training providers. Each company is collaborating with Cadence to help customers adopt more productive system level design and verification methodologies. You can find a complete list of these companies and a description about the collaboration at www.cadence.com/alliances/system_realization.

The hardware and software tool providers are working with Cadence to improve interoperability, document flows, and recommend optimal methodologies. They include ARM, Calypto, Imperas, and Wind River. IP companies are working with Cadence to create system-level IP for design and verification to enable more reuse and higher productivity design and verification flows. Companies leading the way in this category are ARM and Silicon Hive. The services companies are, or will be, trained to provide expert-level services to customers who want to ramp adoption rapidly and increase project success. There are five service providers in Japan, as well as ASTC, CircuitSutra, and XtremeEDA. Training companies are aligning their various courses and materials to educate students about the additional details of the TLM Design and Verification methodology. Doulos is one company that's leading the way.

TLM Design and Verification is an important aspect for System Realization and EDA360. It is a connection point between system architecture, software development, and hardware development. The high productivity path to silicon from TLM will greatly reduce costs and increase IP reuse for chip development. It also enables earlier software development and system integration, thus facilitating the creation of application-driven system development solutions. Collaborations are founded upon the TLM-driven Design and Verification methodology, extending it as needed for their particular domain. The TLM methodology is also documented in a newly released book by Cadence.

Only a broad-ranging alliance can span the scope of system development. With the System Realization Alliance, Cadence is investing in enabling a truly open system development solution that fosters innovation and benefits the entire industry. Some of these companies have been working with Cadence previously and are extending the scope to include new areas of System Realization. Others are new collaborators, and we expect many exciting things from our work with all of them. I welcome them and thank them for their efforts to improve System Realization for the industry.

Steve Brown

 

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information