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In this quarterly blog, I will share
what the teams across the Cadence Incisive verification platform have developed and
shared on Cadence Online Support, https://support.cadence.com/, in the last month of 2013
and first month of 2014 to enable verification and design engineers be comfortable and well versed with Cadence verification tools, technologies, and solutions.
Rapid Adoption Kits (RAKs)
from Cadence help engineers learn foundational aspects of Cadence tools and
design and verification methodologies using a "do-it-yourself"
approach. Application notes (app notes), tutorials, and videos also aid in developing a deep understanding of the subject at hand.
Download your copies from https://support.cadence.com/ now and check them out for yourself. Please note that you will
need Cadence customer
credentials to log on to the Cadence Online Support https://support.cadence.com/ website.
Reuse UVC for Acceleration - RAK
There are thousands of legacy
UVCs, stable and reliable, developed over the last 15 years. It is ideal to reuse these environments when starting acceleration verification,
rather than creating the whole verification environment from scratch.
This RAK provides a short overview
of the process required for taking a UVC implemented in e, and
using it for verifying a DUT running on an acceleration machine, e.g. -
Palladium. It describes the steps that have to be taken for adapting the
UVC to achieve the desired goal of acceleration verification - executing tests
significantly faster over running with RTL.
Rapid Adoption Kits
UVM e : Reuse UVC for
Acceleration Performance Boost - RAK
When employing acceleration verification, speed is a
crucial aspect. The verification engineers strive to get supreme performance,
while maintaining verification capabilities.
This RAK provides
suggestions for advanced techniques for maximizing the performance of verification
acceleration. It discusses the various interfaces between the simulator and the
acceleration machine, and their effect on performance.
UVM e : Acceleration
Download (0.4 MB)
Introduction to CPF Low-Power Simulation - RAK
illustrates Incisive Enterprise Simulator support for the CPF power
intent language. The RAK provides instructions on invoking a CPF simulation in
Incisive Enterprise Simulator, and also provides an overview of SimVision debug capabilities and Tcl
debug extensions. It also comes with a hands-on lab to examine CPF behavior in
to CPF Low-Power Simulation
Download (1.7 MB)
Introduction to IEEE-1801 / UPF Low-Power
Simulation - RAK
RAK illustrates Incisive Enterprise Simulator support for the IEEE 1801 /
UPF power-intent language. In addition to an overview of Incisive Enterprise Simulator features,
SimVision and Tcl debug features, a lab is provided to give you an
opportunity to try these out.
Rapid Adoption Kits
Introduction to IEEE-1801 / UPF Low-Power Simulation
Simulator Interface Synchronization Debug Cookbook - App Note
This Specman Simulator Interface
Synchronization Debug Cookbook is supposed to be a guiding document for every
engineer who wants to learn about Specman - simulator interface
synchronization. This is a comprehensive document that includes a flowchart
that can be used in order to map the problem, and take the correct steps in
order to resolve it. It also includes a detailed section for every possible
problem and its solution. This cookbook is also very useful for power users to
be able to debug these kinds of issues independently.
Loading Commands at Runtime for Verilog Tests - App Note
This app note
on Loading Commands at Runtime for
Verilog Tests illustrates how to convert directed Verilog tests into
command files to enable a single compile flow, and shows the ability to use the save
and restore feature of Incisive Enterprise Simulator.
described in this note focuses on support for Verilog [IEEE 1800]. This
app note shows you different approaches to optimize the execution and
runtime of Verilog directed tests. It illustrates how to remove redundancy and
how to run only portions of a test that are of interest. The suggestions in
this app note can be adapted to your particular setup. An example testcase is included.
Incisive Enterprise Specman Elite
Testbench Tutorial - Tutorial
Incisive Enterprise Specman Elite Testbench Tutorial is also available online for you to take advantage
of this self-help tutorial.
goal of the Specman tutorial is to give you first-hand experience in how the
Specman system effectively addresses functional verification challenges. The
tutorial uses the Specman system to create a verification environment for a
simple CPU design.
8. How to Detect Glitches in Simulation Using
IES - Video
The video "How to Detect Glitches in Simulation Using IES" discusses
the common reasons of glitches in gate-level simulation. It also discusses the
techniques to detect and analyze glitches during simulation with Incisive
9. Delay Modes Selection, and Their Impact in
Netlist Simulation - Video
The video "Delay Modes Selection, and Their Impact in Netlist Simulation" discusses different
delay modes in which netlist simulation can be done. It demonstrates different
methods to select a delay mode and the impact of a selected delay mode on timings
10. What's New in 13.2 Debug Analyzer and SimVision - Videos
Short demo videos are now available on the latest/greatest
features of our 13.2 debug solutions. You may want to review them
yourself just as a refresher on the latest features of both SimVision and Incisive Debug
Both of these videos will be linked to in the "What's New in
Debug" screen that is launched at SimVision/Debug Analyzer startup or
accessible through the help menus.
We will continue
to provide self-help content on Cadence Online Support, your 24/7 partner for
getting help in resolving issues related to Cadence software or learning
Cadence tools and technologies. If you are signed up for e-mail notifications,
you've likely noticed new solutions, app notes (technical papers), videos, manuals, etc.