Insights from the Verification Software Track at CadenceLIVE Silicon Valley 2025

Earlier this month, I had the opportunity to attend CadenceLIVE Silicon Valley 2025, a premier event that brings together semiconductor and systems innovators to share how they are leveraging Cadence tools to drive design excellence. Among the many engaging sessions, the Verification Software track highlighted how leading companies are advancing verification methodologies to meet the demands of increasingly complex designs. The track featured seven presentations from industry leaders, each offering a unique perspective on how SVG’s verification solutions are being applied to real-world challenges. Here are a few highlights that particularly resonated with the audience: 

AI-Driven Verification at Scale

Abhisek Verma, NVIDIA

Nvidia presented a forward-looking paper titled “Optimizing Verification Efficiency with Verisium SimAI for Enhanced Bug Detection.”

This study delves into the transformative capabilities of Xcelium SimAI to significantly enhance random verification efficiency. This presentation was voted best paper of the track and was very well attended.

Addressing Multi-Die Verification Complexity

Mayank Bakshi, Samsung

Samsung’s presentation, “Multi-Die Verification Challenges and Mitigation Strategies,” focused on the growing complexity of verifying multi-die systems.

To accelerate interconnect verification, this paper proposes a special UCIe Verification IP (VIP) that is “sandwiched” with streaming protocol VIP and coherent VIPs forming “UCIe VIP sub-system” to achieve verification of system-level coherency even before the complete multi-chip RTL/design environment is ready.

Embracing Incremental Elaboration – Celestial AI

Dan Cohen - Prasad Ginda, Celestial AI

Celestial AI delivered an interesting paper titled “Incremental Elaboration—Everyone Should Use It.”

Celestial AI collaborated with Cadence to optimize Xcelium's simulation performance. The optimized flow reduced testbench change build time from 30 minutes to 3 minutes. Verification engineers iterated faster, improving productivity and debugging efficiency.

Overall, the Verification Track was highly informative and well worth attending. It offered valuable insights into how customers are solving problems using SVG tools. If you like to view the presentations above, and many more from CadenceLIVE, they are available on-demand here!

A Broader Look at the Event

Beyond the technical tracks, CadenceLIVE Silicon Valley offered a rich program of keynotes.

The event opened with a fireside chat between Cadence CEO Anirudh Devgan and NVIDIA's Founder and CEO, Jensen Huang, pictured on the right, who offered rare and insightful perspectives on the evolving landscape of AI and introduced the Millennium M2000 Supercomputer accelerated by Nvidia Blackwell. This was followed by Anirudh’s keynote, which outlined Cadence’s strategic vision for the future.

Next, Uri Frank, Google's VP of Engineering, delivered a keynote titled “The AI Hypercomputer.” This keynote highlighted Google’s AI teams' usage of Cadence products and how silicon design must evolve to meet the demands of large-scale, AI-centric workloads.

Later in the day, Chuck Alpert, AI Fellow at Cadence, led a general session introducing Cadence’s latest advancements in agentic AI. He demonstrated how intelligent agents are being embedded across Cadence’s EDA tools to automate complex tasks and assist users.

The mainstage program concluded with a second fireside chat, this time between Anirudh Devgan and Intel CEO Lip-Bu Tan. Their conversation reflected on Intel's evolution and current semiconductor industry trends.

Overall, CadenceLIVE Silicon Valley was a very exciting event. To learn what Cadence customers are achieving with our tools was motivating and very interesting, and listening to the visionary keynotes and fireside chats was a fantastic opportunity. I look forward to CadenceLIVE Silicon Valley 2026!