Learn How Valens uses Specman Macros Automate Configuration of Verification Environments at DVCon EMEA Next Week

Valens has achieved success through applying Specman to their verification projects. At DVCon EMEA (Oct 24-25) you can learn how their use of Specman Macros to automate configuration of the verification environment to their design. This saves them effort and lowers the learning curve for engineers who jump from project to project. In collaboration with Veriest Verification Ltd, a Cadence Connections Verification partner, they have created a verification environment approach that enable them to fully exercise their device through broader team contributions.

Check out their session 7.1 on Thursday, Oct 25th at 1:15pm in Forum 6 room