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Lana Chan
Lana Chan

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NVMe 2019 Developer's Conference: NVMe 1.4 Is Almost Here, and Enterprise and Cloud Adoption Is Poised for Mainstream Adoption

21 Mar 2019 • 2 minute read

Unlike previous years, the annual NVM Express Developer’s Conference was held in Fremont instead of San Jose.  A well-attended event for the 120+ member consortium, this was a fantastic opportunity for developers to network and discuss new developments and how to keep NVMe simple, fast and scalable.

Robust growth across client, enterprise and cloud segments was shown with data from Forward Insights.    With a hockey stick growth chart, the client segment has been and projected to be the strongest of the three segments in the upcoming years.  The sharp price reduction in NAND flash has been the key accelerator to adoption of NVMe to reach parity with SATA SSDs. 

But what about the enterprise and cloud space where NVMe’s strengths of high bandwidth at low latency plays extremely well?  SAS is the incumbent in this arena and there has been resistance to move away from tried-tested and true.   Furthermore, the latest incarnation of SAS-4 @ 22.5 Gbps matches well with the PCIe Gen 4 ecosystem.  That’s where the scalability of PCIe factors into the picture.  SAS-4 bandwidth can be beaten with 4 lanes at Gen 3 or 2 lanes at Gen 4.  And then we have PCIe Gen 5 on the horizon at 32GT/s. 

The numbers do indicate that there is growing momentum for NVMe in the enterprise and cloud space and that it is approaching mainstream adoption.  What will be instrumental in pushing this forward are features like I/O Determinism, Persistent Memory Region (PMR) and multipathing slated for NVMe 1.4.   

I/O Determinism improves data latency by configuring drives into multiple sub-drives.  This partitioning of the SSD allows different workloads to only run in a designated portion of the SSD.  This addresses the “noisy neighbor” problem where writes to the SSD may interfere with reads that are occurring.  The result is read-only like latencies for mixed read/write workloads.

Meanwhile, PMR is an optional region of PCIe read/write persistent memory improves performance by augmenting system memory with DRAM on the SSD.  Applications for PMR include write cache, RAID logs, dedupe etc. 

Finally, multipathing refers to the concept of two or more independent PCIe paths between a single host and a namespace.  This enables ease of data sharing and the optimal path to a namespace and where your data is stored.

What will be interesting to see in the upcoming months is how NVMe-TCP and computational storage will play out.  NVMe-TCP is the latest transport added to NVMe; PCIe, RDMA and FC.  NVMe-TCP promises to allow data centers to use their existing Ethernet infrastructure.   Overhauling existing infrastructure has been cited as potential impediments for other NVMe-oF options.    This may be the key to achieving wide adoption in the enterprise space.  Finally, with computational storage in its infancy, there is a promise to bring computation to the data.  The conversation about real-time big data analytics will change dramatically if this gets off the ground.

Now with all this potential and adoption, the topic of interoperability did rear its head in this year’s discussion.   How does one ensure that one’s device is compliant and give that confidence to your customers that your product will operate correctly?   UNH-IOL define test plans and hold plug-fests to test for conformance and interoperability for NVMe, NVMe-oF and NVMe-MI.

 

As NVMe gains traction, interoperability and conformance will become more and more important and the passing the UNH-IOL tests will be key measurement for functional quality.

Cadence’s NVMe TripleCheck product includes UNH-IOL defined tests that allow IP developers to test for functional correctness prior to hardware availability.   For more information: NVMe 1.3 VIP

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