Verified by e/Specman: The Palladium XP Verification Computing Platform

After much anticipation, it feels great to be free to proclaim that e/Specman (as part of IES-XL) was used with a complete, vPlan-based, metric-driven verification flow to verify the primary chips inside the new Palladium XP Verification Computing platform.

In a future post we’ll share with you some interviews with our colleagues in R&D that did this verification work, as well as how the machines in this new product line can themselves be used with Specman/IES-XL to do some seriously high throughput verification.

But for now, the spotlight belongs on the development team and the forward thinking, “lighthouse” customers that brought this ground breaking system to market.  We urge you to take a minute to read all about it:
http://www.cadence.com/products/sd/palladium_xp/pages/default.aspx

Happy Verifying!

Team Specman

[On Twitter: @teamspecman]