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Welcome Sharath Siddappa, the 5000th OVM World registrant! In only 10 months, the OVM has grown beyond 5000 registrants to more than 5200. I took the opportunity to ask Sharath a few questions about his interest in the OVM and how he wants it to develop and here's what he had to say.
I have been working in Rambus Chip Technology (I) Pvt Ltd for past 2 years as verification engineer. I got chance to work on different verification languages (Verilog, Vera and SystemVerilog). I have expertise in SystemVerilog and AVM. Currently working on OVM based methodology for memory controller design. My role is to develop the verification environment for memory controller design and also verify the functionality.
I wanted to share my working experience on SV and OVM and to know others experience with OVM. I also wanted to use this forum to discuss any OVM related issues with experts.
I have been working with OVM for the past five months.
We are using OVM as a methodology to create VIP for memory controller design. We are using most of the base classes defined by OVM, mainly UVC concepts, factory concepts and virtual sequences.
I would put UVC, factory concept and in-built methods for sequences as key features of OVM.
OVM is enabling reuse and making VIP more robust and configurable which is essential for an IP provider like Rambus.
I want OVM to fill the gap between different Methodologies and make people comfortable when they migrate from other Methodology to OVM. I also feel OVM should fill the missing pieces of methodology like all the stable features in other methodologies (eRM).
How has the OVM improved your verification capabilities? Feel free to share your stories here or in the OVM World forums.