Apple iPad: no LPDDR2?

Guest Blogger: Marc Greenberg, Technical Marketing Director

By now it seems that anyone with an engineering degree has probably read 2 or 3 teardown reports on Apple’s iPad. Few that I have seen so far talk about the DRAM memory subsystem -- and that could be because the DRAM was hidden on top of Apple’s A4 processor.

Chipworks.com has torn down Apple’s A4 processor package and reports that the DRAM subsystem consists of two Samsung LPDDR1 1Gbit memories in package-on-package (PoP) configuration. The PoP allows for the DRAM to sit on top of the application processor and the whole thing has been marked on top with Apple’s A4 logo. There’s a great cross-sectional photo of the PoP system showing the A4 processor underneath and the two DRAM dice on top.

It’s no secret that the iPad has a substantial amount of MLC NAND flash, but the interesting thing for me was Apple’s continued reliance on first generation Low-Power DDR1 (LPDDR1) technology instead of latest-generation LPDDR2. LPDDR1 technology was introduced in 2003 making this one of the oldest technology standards in use in the iPad.

Several applications processors already support LPDDR2:
- ST-Ericsson U8500
- Freescale i.MX508
- TI OMAP4
- Broadcom BCM2763 - Samsung S5PC100
Plus a bunch of others that we at Denali know about but which are not public yet.

The specific DRAM in use in the iPad appears to be a Samsung K4X1G323PE according to this die photo. According to the part decoder, we can see this is a 1Gbit X32 4 bank LPDDR1 device with 1.8v IOs. Samsung’s Mobile DDR (LPDDR1) product list indicates that the maximum speed of operation of this die is 200MHz (DDR400).

Even though LPDDR1 was introduced in 2003, the 1Gbit LPDDR1 parts are a relatively recent introduction, and the mask date code on the die photo is September 2008. Relying on 1.8V signaling, LPDDR1 has higher operating voltage than DDR3 (1.5v), DDR2L (1.5V), DDR3U (1.2xV) and LPDDR2 (1.2v). LPDDR1 also has the lowest maximum operating frequency of any of the DDR DRAM technologies commonly in use today (DDR2, DDR3, and LPDDR2). LPDDR1 does have lower standby power than any of the DDRx technologies however, surpassed only by LPDDR2.

LPDDR1 definitely has its place in applications that don’t need all the LPDDR2 bandwidth and which also need less memory capacity and low standby power. But for a mobile computing-intensive device like the iPad, LPDDR2 would have been an obvious choice. Among the benefits of LPDDR2 are that LPDDR2 offers lower voltage operation (and thus less power), more flexible power management modes, fewer package pins (less costly packages), and higher frequency of operation (more bandwidth) in comparison to LPDDR1. LPDDR2 is specified for up to 533MHz/DDR1066 operation and new designs are commonly specifying up to double the LPDDR1 frequency.

LPDDR2 also has the unique property of supporting Non-Volatile Memory (NVM) such as Phase-Change Memory (PCM) on the same bus as LPDDR2 DRAM. This LPDDR2-NVM offers similar performance to DRAM but with less operating power and near-zero standby power and also offers faster system boot and resume from suspend times.

The question is, why did Apple not choose the latest generation LPDDR2 parts for the iPad? It could be a couple of reasons. They may not have been able to source 600,000 LPDDR2 dice in time for the launch. The LPDDR2 parts may be at too much of a cost premium. It could have been a hang-over from the iPhone. Or there could be a marketing answer: Apple may have designed the A4 to work with LPDDR1 or LPDDR2 technology. That would allow a later version of the iPad to use LPDDR2 to provide longer battery life and more performance -- enough for multitasking, perhaps?

Whatever the case may be, LPDDR2 is an available option on high-end application processors and is ready for all kinds of new designs. Denali has offered LPDDR2 memory models since the early part of 2008 and was making customer deliveries of Denali’s Databahn LPDDR2 memory controllers at the end of 2008. Today, Denali offers high-performance and low-power memory controllers and PHYs for any combination of DDR1, DDR2, DDR2L, DDR3, DDR3L, DDR3U, LPDDR1, LPDDR2-DRAM or LPDDR2-NVM.

Find out all the latest information on DRAM technology at Memcon, July 28th in Silicon Valley: www.memcon.com

Thanks,

Marc