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Visitors throng to Cadence's M-PCIe Demo at PCI SIG, Santa Clara, 2013. Martin James of Cadence answers questions.
It was fitting that Cadence would be the first to demonstrate the PHY and controller IP with high-speed links across M-PHYs. Cadence was one of the initial sponsors of this ECN. The Cadence design team actively participated in the discussions and contributed to the specification. Our design is a native RMMI based implementation, unlike implementations that convert PCIe to M-PCIe using a shim layer. The shortcut via the shim might be tempting, but does not help realize the power advantages of the protocol!
Cadence PCIe Team (Osman Javed, Arif Khan, and Gary ***) with Wei Wang (Cadence Sigrity Group) with the Gen3 Performance Demo
The Cadence booth also had presence from our Sigrity product line and Verification IP team, representing the broad presence in this arena. Guoqing Zhang of Cadence also presented a talk on testing and verification of NVMe PCIe Devices.
The Cadence booth at PCI SIG Developers Conference 2013: Center Stage
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