CDNLive Silicon Valley 2016—The Bigger IP Picture

When a presentation makes us think about an industry on a whole new level and rethink potential outcomes for something significant in our lives, it’s a huge success. This year’s CDNLive San Jose was great for both Cadence and the industry, and here’s why.

Overall, 75% presentations were from customers, and great keynotes (details below) engaged the other attendees. The keynotes on the future of the Internet of Things and Automobiles shifted minds to think differently about our relationship with the transportation and devices. Imagine no parking in San Francisco, smart-phone hailed, self-driving ride-sharing taxis everywhere. And the volume of semiconductors that will enable all of that.

The Design IP Track was another big success. Talks on SerDes design, DDR design, silicon characterization, and signal integrity were highlights. The track’s best paper award was bestowed upon Prashanth Thota from Tektronix for his presentation on signal integrity of high-speed memories. Dinesh Venkatachalam from Broadcom presented “SerDes 101 for SoC Designers” and drew many questions. Motti Beck of Mellanox summarized trends in datacenters and implications for server east-west traffic through PCIe 4. Alain Legault, VP of IP Products at Hardent, described a solution for 3X high-definition MIPI video compression. And Mike Eftimakis, Product Manager at ARM, presented “Designing IoT Products Cheaper and Faster”.

Figure 1: Cadence/Mellanox PCIe 4.0 Interoperability Demonstration

Conference proceedings are available online for downloading at this link.

Another great CDNLive Silicon Valley event. Now on to Munich!

Steve Brown