Chiplet Integration in the Automotive Realm

As technology continues to advance, the automotive industry is rapidly transforming. The integration of chiplets, or small microchips that work together to form a larger, more powerful system, is at the forefront of these advancements.

This blog post is an excerpt from a presentation at CadenceLIVE 2024 in Silicon Valley by Pratibha Sukhija, Anunay Bajaj, and Ericles Sousa. We will examine the intricate details of chiplet technology in the automotive industry, exploring its significance, use cases, challenges, and verification processes.

The Role of Chiplets in Automotive Systems

As we push the boundaries of what is achievable in automotive electronics, the limitations of monolithic designs have become apparent. Traditional single-die approaches are constrained by cost, yield, and manufacturing challenges. Enter chiplets and multi-die packaging—a solution that allows for greater scalability and functionality within a single package.

Why Chiplets?

• Reduced Waste: Integrating multiple smaller chips into a single package reduces material wastage.
• Improved Cost Efficiencies: The scalability of chiplets enables cost-effective production.
• Enhanced Yield: Smaller dies are easier to manufacture with higher yields.
• Scalability: Combining several smaller dies within a single package effectively mitigates the constraints associated with basic silicon monolithic scaling.

Chiplets enable a modular system design by integrating multiple smaller chips, each dedicated to different functionalities. This modularity is where UCIe (Universal Chiplet Interconnect Express) plays a pivotal role. UCIe provides a die-to-die serial interconnect that supports major protocols like CXL, PCIe, and streaming raw modem. It currently supports 2D and 2.5D packaging, with future developments aiming for 3D packaging.

Use Cases – Automotive

The automotive sector has evolved dramatically, and chiplets are at the heart of this transformation. Modern vehicles are increasingly driven by sophisticated electronics rather than just mechanical parts. The diagram presented is a typical stack from the UCIe perspective. 

A typical UCIe-based stack includes AI accelerators and various compute models, which were previously constrained by reticle size limits, now divided into multiple chiplets connected by the UCIE protocol. This setup facilitates advanced functionalities in automotive applications such as safety islands and engine control systems.

Key Challenges in Automotive and UCIe Enhancements

The three main challenges that the UCIe work group is currently facing are:

1. Preventive Monitoring
2. Interoperability and Multiprotocol Support
3. Functional Safety

Preventive Monitoring

Preventive monitoring ensures the integrity and functionality of systems are composed of multiple chiplets. Regular diagnostics and testing are essential to maintain hardware performance over time. For example, every time a vehicle undergoes routine maintenance, its electronic components are thoroughly checked to ensure all electrical signals are within safe limits. UCIe has introduced dedicated registers to capture eye margining information and software triggers for periodic retraining, ensuring high-quality signaling.

Interoperability and Multiprotocol Support

UCIe supports multiple protocols such as UCIe, CXL, and streaming protocols, allowing for significant innovation and the implementation of proprietary protocols. UCIe 1.1 introduces a streaming protocol capable of multiplexing with other protocols, enabling multiple protocols to operate simultaneously for higher performance, crucial in automotive applications.

Functional Safety

Functional safety is critical, given the high stakes in automotive applications. Enhancements include CRC and retry mechanisms on the main band side to ensure reliable data exchange. The UCIe specification includes provisions for safety protocols like ISO 26262, essential for fault reactions and technical solutions in automotive applications.

UCIe System-Level Verification

System Level - Performance Concerns

In automotive applications, ensuring the performance and integrity of chiplet-to-chiplet traffic is crucial. Real-time operations involve millions of protocol conversions per second, raising the risk of throttle points and potential delays. Verification processes must identify these bottlenecks to optimize performance.

Solution - Complete System Performance and Integrity Checking

A systematic approach to verification involves:

1. Streamlining Clusters: Using coherent emulation or simulation verification models.
2. Creating Libraries: Developing specific libraries related to coherency protocols and performance metrics.
3. Embedded Tests: Utilizing C-written tests to gather heuristics and logs for system-level scoreboarding, ensuring transaction integrity.

System Performance Analyzer

System performance analyzer (SPA) monitors bandwidth usage, latency fluctuations, and outstanding transactions, providing detailed statistics crucial for optimizing system performance. This capability is vital for automotive applications where thousands of transactions occur simultaneously, ensuring comprehensive system verification.

Conclusion

Navigating the integration of chiplets in the automotive realm is a complex yet rewarding endeavor. By addressing the challenges of preventive monitoring, interoperability, and functional safety, and leveraging advanced verification processes, we can unlock the full potential of AI accelerators and sophisticated electronics in modern vehicles.

Stay ahead of the curve and explore the future of automotive electronics with Cadence. For those who missed the detailed presentation at CadenceLIVE 2024, you can still register at the CadenceLIVE On-Demand site to access this and other insightful presentations.

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