Continued Strength of the Design&Reuse IP-SoC India

Design&Reuse events are always exciting for their draw of an IP-centric audience. This year’s event was held in Bangalore, on April 6^th, and drew over 130 attendees. Experienced IP providers, fables IC vendors, external IP managers, internal reuse managers, foundries IP portfolio managers, IP market analysts, IP standard gurus. The scope of event is impressive, as represented by the breadth of presented concepts.

The keynotes were given by various, seasoned specialists. Gabriele Saucier from Design&Reuse spoke about industry trends in IP and the fact that most of the visits to their website are from India. Venky Kumaran from the India Electronics and Semiconductor Association (the industry body that represents the industry) gave insights about the Indian semiconductor industry based on the recently-released IESA-Ernst&Young industry report. Samir Patel, CEO of Sankalp Semiconductor, Sanjeev Sharma from Terminus Circuits and Sujoy Chakravarty from SilabTech spoke about industry trends and the role IP will have to play in some of the key trends such as IOT and automotive.

In the afternoon session, Sundararajan A., Staff Design Engineer from Cadence, presented the session “PCIe Gen 4 Steps Forward”, covering the collaboration with Mellanox to test PCIe Gen 4 interoperability of our high speed SerDes IP. Read more about that here.

We look forward to more Design&Reuse IP SoC events. The next one is in Shanghai, September 2^nd, 2016. See you there!