Revolution on the Road: How Cadence is Driving the Future of Automotive Design!

5 Mar 2024 • 8 minute read

The automotive industry is at a crucial inflection point, pivoting from traditional vehicles to intricately designed marvels of technology. This metamorphosis is evident not only in the vehicles on the road but in the fabric of their functionality—the silicon at their heart. For instance, cars these days do a lot more than drive—they think, react, and adapt. This transformation has led to a burgeoning relationship between automotive and semiconductors, turbocharging the semiconductor market's growth.

However, navigating through the rapid evolution of the automotive industry—one marked by advancements in autonomy, connectivity, and electrification—engineers and experts face the formidable challenge of transforming vehicle electrical and electronic (E/E) architectures. This is where Cadence Innovative IP and other products come in to make this transformation easy. Cadence offers a vast array of innovative IPs and tools; the wide product range covers a variety of applications, from infotainment systems to functional safety and system analysis.

This post is an excerpt from Robert Schweiger’s talk at the CadenceLive Europe 2023. It discusses the changing trends and impacts of transformation on automotive SoC and system design and highlights Cadence pivotal role as an enabler of this evolution

Recent Trends in the Automotive Industry

The semiconductor industry, as forecasted in the August 2023 IBS Semiconductor Industry Outlook, is poised for substantial growth in the automotive sector, with an anticipated increase of 12.98% in 2024. This surge is chiefly attributed to the rapid advancements in vehicle electrification, autonomy, and software-driven innovations. Leading semiconductor corporations alongside agile startups are at the forefront of this transformation, particularly in sensor technology and artificial intelligence. These pioneering efforts are resulting in revolutionary enhancements across the industry. As vehicles evolve from incorporating advanced driver-assistance systems (ADAS) to achieve full autonomy, the progression is meeting and exceeding consumer expectations, marking significant milestones in in-depth perception and intelligent driving technologies. With the evolving automotive industry, the below trends are pretty much straightforward:

Drive toward Advanced semiconductor nodes
- 3D-IC design, Chiplets
- 5nm, 3nm gate-all-around (GAA)
Changing Architectural Paradigms in Automotive Design

Advanced Semiconductor Nodes: The New Vanguards in Automotive Chips

Today's automobiles have evolved far beyond their original purpose of simply transporting individuals. They have become luxurious havens of comfort and safety, equipped with sophisticated features. ADAS, comprehensive onboard entertainment systems, and seamless connectivity options are standard expectations in new vehicles. These features are not just about opulence—they've redefined driving or riding in a car. SoCs must deliver multifunctionality and reliable performance to accommodate these complex requirements, even under the most challenging conditions. Cutting-edge processing technologies like the 5nm—and fabrication processes are at the forefront, paving the way for SoCs with formidable computing capabilities and superior energy efficiency. This powerful combination is essential for powering the sophisticated operation of modern vehicle amenities.

Changing Architectural Paradigms in Automotive Design

Gone are the days when vehicles operated on mechanical prowess alone. The heritage of domain-based architectures, where electronic control units (ECUs) were tailored to specific functionalities like powertrain controls or infotainment systems, is being outpaced by today’s sophisticated and zone-based architectures. The heart of these modern vehicles lies in semiconductors—generating power, managing systems, and thriving on data. The complexity of modern vehicles and the level of automation involved has made it necessary to move from traditional domain-based architectures to zonal architectures.

There are many reasons for this transition, such as:

Scalability Gridlocks
Communication Conundrums
Software Update Struggles

The shift towards electrification and hybridization is as much another primary reason for change in architecture.

Impact on Semiconductor Design

Semiconductor design in the automotive industry has always been wrought with unique challenges. The current epoch is no exception, as the transition to SoC architecture calls for reevaluating design philosophies and methodologies. The transition to a zonal architecture presents myriad challenges, chief among them being the need for a robust high-bandwidth network connecting these autonomous zones. Existing vehicle networks were not designed with such requirements, necessitating a ground-up redesign. And need not mention the reduced time to market!!

Engineers increasingly employ innovative design techniques such as chiplet integration and 3D layouts to pack more functionality within a limited space while ensuring the chip's design is amenable to mass production. Such advancements are increasing concerns related to power consumption, thermal management, electromagnetic interference (EMI), cybersecurity, and functional safety are overarching considerations that must be considered in pursuit of the ideal system.

Challenges: Zone-based architectures

How Cadence Tools are paving the way to this transformation

Cadence has emerged as a crucial player in advanced automotive technologies, providing a comprehensive suite of solutions for intricate systems analysis that addresses today's increased complexity. Its portfolio ranges from IP to system-wide solutions, including verification, emulation, thermal, electrical, and fluid dynamics performance evaluations. These tools validate and predict system performance under various conditions, enhancing vehicle integrity and accelerating development timelines.

Cadence's innovation is vital to automotive design, supplying essential IP for creating sophisticated electrical/electronic architectures that pave the way for autonomous driving. Focusing on both hardware and software solutions, Cadence Tensilica DSPs and Neural Processing Units (NPUs) lead in processing power for automotive applications, further enhanced by the configurable and extensible Xtensa Processor platform, which integrates AI and machine learning with ease.

Cadence offers a myriad of solutions for automotive, such as ADAS/AD, Infotainment, ADAS, simulation VIP, Verification, emulation, system design, etc.

ADAS/AD

Cadence offers scalable computing solutions powered by AI engines and DSPs for ADAS and autonomous driving. For autonomous vehicles, designers use high-performance computing fueled by zonal architecture, sensors, and advanced SoCs where radar, Lidar and camera play a significant role. Cadence extends its Tensilica DSPs and AI engines for such applications, proffering a scalable solution ranging from 0.25 to hundreds of TOPS, ideal for sophisticated computing demands. Their multi-core AI platforms epitomize efficiency, tailored for high-performance computational tasks.

In-Cabin Experience/ Infotainment

In-cabin experiences are evolving significantly, focusing on heightened connectivity and advanced infotainment systems. Cadence NeuroWeave SDK bolsters scalable hardware for AI applications, addressing needs from in-cabin monitoring to speech recognition and object classification. Cadence's automotive Ethernet IP solutions are at the forefront, driving the development of high-performance, reduced-latency vehicular networks.

Alongside state-of-the-art audio and video DSPs, they ensure that in-car experiences transcend mere function to become truly immersive. We offer processor and interface IP (Controllers and PHYs) support at advanced nodes (down to 5nm). All these solutions meet ISO26262 and support AEC-Q100 temp ranges. Further, the recent acquisition of PHY IP from Rambus has strengthened the SerDes and memory interface support.

Simulation Verification IP (VIP) for Automotive

Our comprehensive Verification IPs (VIPs) suite is designed to meet the stringent demands of modern Ethernet and interface standards. For Ethernet Time-Sensitive Networking (TSN), we offer a mature, feature-rich compliance verification solution that includes a full protocol stack, bus functional models (BFM), and integrated protocol checkers with coverage capabilities, ensuring seamless integration into test benches at both IP and system levels. Our VIP for Ethernet Base-T1 (PHY) for physical layer testing supports all Base-T1 speeds, including 10Mbps, 100Mbps, and 1Gbps, ensuring thorough and flexible testing scenarios. In sensor application interfaces, our VIP for MIPI A-PHY offers robust support for CSI2 and I2C, complying with MIPI A-PHY v1.0 and v1.1 specifications. Our PCI Express Verification IP is unmatched for high-speed data transfer, supporting PCIe 3.0, 4.0, and 5.0 and catering to leading-edge IP and SoC verification requirements.

MIPI A-PHY: Sensor Simulation Verification: A-PHY with CSI2 and I2C VIPs

Finally, our VIP extends to supporting all CAN standards, ensuring comprehensive verification coverage for CAN, CAN-FD, and CAN-XL specifications. Our VIP lineup is purpose-built to ensure that your products meet the rigorous standards of performance and compliance demanded by these advanced technologies.

Chiplets and Automotives

The global chip market is rapidly growing due to increased demand from the automotive industry, spurred by the rise of advanced driver-assistance systems (ADAS), electric vehicles (EVs), and connected cars. These applications require superior data processing and sensor capabilities, driving innovations such as chiplets, which may become the aggregator of IP into systems and subsystems. Chiplets are a promising alternative to monolithic SoCs that offer lower costs, higher performance, and greater flexibility. Chiplets are also a key enabler of heterogeneous and modular SoC design, which can accelerate innovation and adaptation in the electronic industry.

Cadence has emerged as a comprehensive solutions provider, addressing these challenges with tools such as the Integrity 3D-IC Platform, which unifies disparate design tools, and the Allegro X Design Platform, facilitating PCB design for laminate-based packages. This shows a clear path forward in the automotive industry's evolution, highlighting the critical role of high-performance chips and chiplets in enabling cutting-edge automotive technologies. Moving forward, the flexibility offered by chiplets will likely be vital in meeting the dynamic needs of the market, promising an exciting future for automotive electronics.

As a leader in chiplet-based SoC design, Cadence demonstrated at the recent Chiplet Summit 2024 in San Jose, for the first time, a test chip that includes seven chiplets, each with two UCIe PHY blocks.
We showcased an industry-first eye-diagram measurement of a die-to-die interconnect with speeds of up to 16GT/s on an oscilloscope. This successful implementation of UCIe IP on first-pass silicon is a milestone in die-to-die connectivity!