Intel and Cadence Partner to Build Out the Foundry Ecosystem in America

As a result of the largest public-private investment ever made in the U.S. semiconductor industry, Intel Foundry has announced plans to expand semiconductor facilities in Arizona, Ohio, New Mexico, and Oregon. The investment is aimed at building up a resilient domestic and global supply chain and a world-class foundry business.

Boyd Phelps, SVP and GM, Silicon Solutions Group, Cadence, and Gautam Singampalli, Director of Product Marketing, Cadence, at the demo booth, Intel Ocotillo Campus, Chandler, AZ

Cadence was invited to showcase its advanced solutions in Intel technology at their Arizona facility. The Cadence team demonstrated the Subsystem Test Chip for PCIe 5.0/CXL 2.0 built using Intel Foundry technology, seamlessly interoperating with a commercially available off-the-shelf Intel Alder Lake client platform (desktop PC).

Pat Gelsinger, CEO of Intel, visiting the Cadence demo booth

Cadence demonstrated silicon success in a live working demo at Intel’s inaugural IFS Direct Connect event in San Jose, CA, in February and now at this event at Intel’s Ocotillo Campus in Chandler, AZ.

Among the VIPs who witnessed the demo was Pat Gelsinger, Intel CEO, to whom Cadence Marketing team highlighted the capabilities of our test chip implementation on the Intel process technology. In his remarks to the audience, Pat said,

“We hope to be manufacturing the most advanced AI chips for many of the major semiconductor companies in America, taking advantage of the R&D that is done uniquely in America. And that’s why today is such a thrilling moment.”

Stuart Pann, Senior Vice President and General Manager, Intel Foundry, took this opportunity to show the live Cadence demo to SoftBank Group Corp. founder Masayoshi Son

Rich Uhlig, Intel Senior Fellow and Director of Intel Labs, stopped by to check out the big open-eye diagrams of live PCIe 5.0, 32Gbps data traffic flowing between the Cadence subsystem and the Intel Alder Lake platform.

Lip-Bu Tan, Intel Board Member and former Executive Chair and CEO of Cadence

Intel Board Member and former Cadence Executive Chair and CEO Lip-Bu Tan also had many thoughtful questions about the Cadence Subsystem Test Chip for PCIe 5.0/CXL 2.0 built using Intel Foundry technology. He was pleased to see the Intel Platform change PCIe rates and use the Cadence GUI to monitor and plot real-time eye diagrams of live traffic after each rate change up to 32Gbps.

U.S. President Joe Biden addressed the select group of VIPs, government officials, union leaders, and key Intel partners at the Intel Ocotillo Fab Construction Zone

President Joe Biden announced the historic news about the U.S. government’s partnership with Intel to build world-class, commercially viable leadership in technology and the plans to add to these capabilities and the additional requirements to defense and intelligence, thereby affirming Pat’s statement about reaching the “end of the beginning of our journey to rebuild semiconductors in America.” In his remarks to the audience, the president said:

We're just getting started. The CHIPS and Science Act has led the partnership with companies investing billions and billions of dollars across the country bringing semiconductor manufacturing back to America. …

We are going to once again begin to make the most sophisticated, advanced, and powerful leading-edge chips. It blows my mind that each chip has trillions of tiny features the width of a strand of human DNA. 40,000 times thinner than a single human hair. They require manufacturing precision down to the size of a single atom. The process is enormous. Requires enormous amounts of information and lightning speed they'll produce. They're critical to emerging technologies. They're going to power the future economy like artificial intelligence, quantum computing, 6G communications, and make everything faster, lighter, smaller, and more reliable. …

This is going to transform the country in a way we don't even understand yet.

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