• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. SoC and IP
  3. Magnetic nanodot materials breakthrough presages high-density…
archive
archive
Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
CDNS - RequestDemo

Have a question? Need more information?

Contact Us

Magnetic nanodot materials breakthrough presages high-density MRAM--possible competition for DRAM and Flash in five years or so?

3 May 2010 • 1 minute read
From North Carolina State University (NCSU) comes news of a materials breakthrough that promises extreme density for magnetic RAM (MRAM) devices, possibly in as little as five years or so. Dr. Jay Narayan, the John C. Fan Distinguished Chair Professor of Materials Science and Engineering at NCSU, presented a paper last month at the spring meeting of the Materials Research Society (MRS) detailing his team’s success in patterning high-density, magnetic nanodots on a silicon substrate using self-assembly processing of nanodots made from magnetic materials such as Ni, Ni-Pt, Fe-Pt during thin film growth by pulsed laser deposition. Each nanodot is a single, defect-free crystal that could be used for bit storage on a silicon chip. From the many news stories on the Web, it appears that the current processing technology has produced 10nm nanodots, capable of storing about a Tbit (terabit) per square cm but Narayan says that the technology could be pushed to 6nm nanodots.

Let’s be clear about the announcement, because many of the existing online reports of this development (like this one on Slashdot) are somewhat fuzzy as to just what Dr. Narayan’s team has accomplished: they’ve developed a process to deposit a regular array of magnetic nanodots on a silicon substrate. They have not developed a “chip” because there is no circuitry on that silicon--so far--to address, write, or read the nanodots and therefore these wafers are not yet functional storage devices as portrayed by the headlines of several stories covering this development. Consequently, Dr. Narayan’s time horizon of five years to usable devices seems about right. Conventional CMOS processing hasn’t quite caught up to the 10nm nanodot geometries, much less the extrapolated 6nm. For example, Xilinx is only talking about shipping 28nm logic devices next year and current memory devices are shipping with geometries in the 30-50nm range. Consequently, there are many things that still need to come together to make Dr. Narayan’s magnetic nanodot into a viable storage element. As Dr. Narayan wrote back in an email, “The rest is to follow.”

CDNS - RequestDemo

Try Cadence Software for your next design!

Free Trials

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information