Micron provides detailed synopses of its NAND Flash and PCM presentations at Flash Memory Summit

Micron has done a very smart thing (note to marketers: take matters into your own hands!) and has posted detailed summaries of all the technical presentations its people will be making at next month’s Flash Memory Summit (August 17-19). All of these presentations but one are about NAND Flash semiconductor memory. One is about PCM (Phase change Memory). I am shamelessly reproducing the summaries here:

Micron Keynote Presentation

Flash Memory: The New Technology Driver, Ed Doller -- Vice President and Chief Memory Systems Architect
Flash memory is at the heart of transformative consumer products, including smartphones and tablet PCs. It also has a home as the performance operator in data center servers and storage boxes. No one can question the technology is in high demand and is the new driver in process technology. The next decade is all about memory. The real question is which of the three types of flash memory -- NAND, NOR & PCM -- will remain and will the flash memory of today be viable into the future?

Today, NAND is widely recognized as the predominant flash memory technology, but NOR flash memory serves the needs of applications around the world, and entirely new product categories being defined using phase change memory (PCM). In this keynote Ed Doller, Micron VP & Chief Memory Systems Architect, will shed some light on the flash memory requirements for end applications and summarize which class of flash is best suited for given environments.

And as each of these flash memories continue to scale, management of the technology becomes more complex. Mr. Doller will highlight some of the management techniques being designed today to keep pace with each new flash generation.

Micron Presentations

NAND Flash Security, Michael Abraham -- NAND Applications Engineering Manager
In many storage applications, data security is critically important. Some applications require data that is no longer needed be permanently removed from the storage medium so that it is no longer recoverable through both simple and complex methods. This presentation details how data can be made unrecoverable on NAND Flash.


NAND Flash Architecture and Specification Trends, Michael Abraham -- NAND Applications Engineering Manager
As NAND Flash continues to shrink, page sizes, block sizes, and ECC requirements are increasing while data retention, endurance, and performance are decreasing. These changes impact systems including random write performance and more. Learn how to prepare for these changes and counteract some of them through improved block management techniques and system design. This presentation looks at these NAND Flash requirements across both consumer and enterprise segments.


NAND Flash Scaling is “EZ”: A Technical Tutorial on the Solutions Available for NAND to Continue its Rapid Growth, Pete Feeley -- Director, System NAND Architectures
As the memory industry emerges from the deepest down-turn in its history, NAND flash promises to continue its record breaking growth. Technology scaling is the engine for that growth but is also seeing increasing barriers that threaten to slow it down. This tutorial discusses the history and future of NAND flash error management. Traditional solutions are facing scaling limits and new solutions are needed. What will those look like? How will they impact the integration of NAND Flash? Answers to these are central to the future scaling of NAND and are discussed in detail.


ONFI 3.0: The Path to 400MT/s NAND Interface Speeds, Terry Grunzke -- Senior Applications Engineer

As NAND Flash technology progresses, achieving high performance while maintaining reliability becomes more difficult. The Enhanced ClearNAND devices contain a stack of high-density NAND flash packaged with an ECC controller that includes features to accommodate high-capacity designs while minimizing pin requirements and delivering improved NAND performance and reliability via an “enhanced” NAND command set. This presentation will review these new features in accordance with sample applications that will benefit by utilizing these Enhanced ClearNAND features.


Migrating Consumer Application Platforms to the Latest NAND Technology, Carla Lay -- Applications Engineer

Platform stability is critical for many consumer applications though the existing platforms do not always allow the lowest-cost NAND Flash solution to be used. EZ-NAND Flash devices alleviate the NAND Flash ECC requirement by providing ECC within the Flash device, and allow consumer platforms to be used across multiple NAND Flash technology generations. This presentation will highlight certain considerations that must be accounted for in order to implement EZ-NAND within legacy consumer systems.


Improving NAND Performance Using Upcoming Features, Carla Lay -- Applications Engineer

As NAND Flash technology progresses, achieving high performance while maintaining reliability becomes more difficult. The upcoming NAND devices contain a stack of high-density NAND flash packaged with an ECC controller that includes features to accommodate high-capacity designs while minimizing pin requirements and delivering improved NAND performance and reliability via an “enhanced” NAND command set. This presentation will review these new features in accordance with sample applications that will benefit by utilizing these upcoming NAND features.


NAND Flash Endurance & Performance Requirements for Smartphones, Tracy Seaman -- Senior Applications Engineer

Advancements in NAND Flash process technology have enabled fabrication on tighter geometries resulting in higher-density NAND Flash devices. With proper wear leveling, the number of Program/Erase cycles can be reduced on these NAND Flash devices while still providing adequate endurance for most smartphone applications. This presentation will focus on smartphone usage model data and analysis for the purpose of identifying the true Program/Erase cycle requirements. In addition we will compare system level performance of various NAND technologies in smartphone systems.


Will Phase-Change Memory (PCM) replace DRAM or NAND Flash?, Mostafa Abdulla -- High-Speed Engineering Manager

LPDDR2 is a DRAM and Non-Volatile Memory (NVM) interface standard for attaching memory to high-performance mobile systems. Some LPDDR2-NVM Phase Change Memory (PCM) devices have latency in the same order of magnitude as DRAM, could reduce cost and power consumption in the system, and can offer reduced application start time and reduced boot time through execute-in-place (XiP) operation. Is LPDDR2 NVM supplemental to existing technologies, or does it replace DRAM or NAND Flash? This paper will analyze the latest publicly available data on LPDDR2-NVM, draw comparisons on power usage based on today's devices, and discuss how the hardware and firmware in the system would change to take advantage of LPDDR2-NVM memory.


If that alone is not enough to make you want to sign up for the Flash Memory Summit (FMS), I don’t know what is. However, remember that Micron is not the only company speaking, presenting, and exhibiting at FMS. There are many, many more. Register for FMS here: http://www.flashmemorysummit.com/