Xilinx unleashes triad of low-power, 28nm FPGA families with very promising characteristics for memory interfacing

Today, Xilinx unveiled three new series of FPGAs all based on 28nm process technology from Samsung and TSMC. The three families are called the Virtex-7, Kintex-7, and Artix-7 series. All three FPGA families feature programmable I/O drivers with I/O voltages as low as 1.2V, which theoretically permits the use of all advanced, single-ended SDRAM interfaces such as the low-voltage LPDDR2 and high-speed DDR3-2133 memory interfaces. Devices in the low-end Artix-7 FPGA family, packaged in low-cost wire-bond packages, have as many as 450 I/O pins. The middle Kintex-7 FPGA family, available in flip-chip packages, have as many as 500 I/O pins and the high-end Virtex-7 FPGA devices have as many as 1200 I/O pins. The Artix-7 and Kintex-7 FPGAs are largely differentiated by performance (with some larger Kintex-7 devices offered) and unit price. The Kintex-7 and Virtex-7 FPGAs are differentiated by gate and I/O capacity and unit price.

Xilinx has based all of the -7 FPGA devices on a very advanced 28nm process technology that reduces electron tunneling through the gate dielectric using a halfnium-dioxide high-k, metal-gate (HKMG) FET gate stack to replace the more conventional Poly/SiON (polysilicon-gate with silicon oxynitride gate dielectric) stack. The hafnium-dioxide gate insulator reverses the trend towards thinner and thinner gate oxides and increasing gate leakage, which first started to cause problems at the 90nm process node. The increasing amount of leakage at due to tunneling at nanometer lithographies finally drove leakage currents up to unacceptable levels at 28nm for Xilinx. Xilinx observed that usable performance from shrinking device geometries was nonexistent by the 28nm node using the conventional FET gate stack so the company has adopted a more advanced 28nm process technology to combat the rise in static and dynamic power.

The resulting 28nm process technology allowed Xilinx to introduce three separate classes of -7 FPGA:

Artix-7: with 20% better performance, 50% lower power consumption, and 35% lower cost than the company’s Spartan-6 FPGAs.

Kintex-7: with double the performance of the previous -6 FPGA generation, in low-cost packaging.

Virtex-7: with double the performance of the previous -6 FPGA generation and large numbers of I/O pins.

All three of the new Xilinx -7 FPGA families share a common architecture, making it easier to move designs from one -7 FPGA family without a redesign to the next -7 FPGA family based on performance and cost criteria. The -7 FPGA family design tools also do a more thorough job of evaluating opportunities for fine-grain clock gating, which can reduce dynamic power by as much as 20%.

Devices in the three FPGA families are scheduled to become available early in 2011.