Yes! Full 2-Day IP Track at CDNLive Silicon Valley

CDNLive Silicon Valley 2015 will be held Tuesday and Wednesday, March 10-11, at the Santa Clara Convention Center. For the first time, we’ll have a very interesting 2-day IP track at the conference. Sign up now!

Check out our exciting agenda in Track 7. Some of the highlights include:

• External Memory Architectural Choices for Terabit-Class Devices by Broadcom
• Applying Maslow’s Hierarchy of Needs to IP Reuse by IPextreme
• Rethinking SoC Architecture for the IoT Age by CTO Chris Rowen
• Achieving the Lowest Power Processing in Always-On Applications
• DDR4 Subsystem Implementation on 166FF/16FF+ Targeting Infrastructure Applications—Challenges and Design Techniques
• Bringing PCIe Performance to Mobile Platforms

CDNLive Silicon Valley 2015 features over 80 presentations, mostly from Cadence customers or partners. The conference also includes keynote speakers, two lunches (including a Wednesday lunch with Cadence R&D), Designer Expo Cadence and partner exhibits, and many opportunities for networking with other engineers. Sign up now!