AI Unleashes Chip Designer Productivity

Introduction

I regularly talk with customers designing really, really big chips, and invariably they need help. The amount of integrated functionality is incredible, and designers are cracking under the strain. The billions of gates and design details, the multitude of steps in the 5nm process technology flow, and reaching that elusive target power, performance, and area (PPA) on schedule are all overwhelming. There’s a lot of hype about AI in EDA, which raises their hopes. But does it really live up to the hype, and is it going to solve these challenges?

EDA has a history of enabling breakthrough designer productivity. From these productivity advancements, electronics have been able to grow and enable new functionality because designers could produce more in essentially the same project windows. Most EDA innovations are evolutionary, providing incremental productivity and PPA improvements. Overall productivity marched upwards, but changes didn’t deliver annual whiplash. But every once in a while, maybe once every 15 to 20 years, something came along that changed the game.

We are now at another one of those tectonic moments. AI in EDA isn’t just making things a bit better. It is fundamentally changing what can be achieved, what can be designed, how teams can scale, what talent is required, and what the operating model of an R&D organization requires. But because of the dust cloud of noise about AI, it’s hard to separate the hype from the real value. I want to share my view on the real value, and more importantly the value our customers are experiencing.

Breakthrough Productivity Gains

The transformational value of advancements in EDA is that designers can do more in the same amount of time. Engineers continuously enable new design features, address density and power consumption challenges, and solve technology problems in semiconductor process design, lithography, manufacturing…and the list goes on. These feed the growth of metrics such as gate count, verification throughput, and more. But the value impact is evolutionary. Truly discontinuous innovation comes from designer productivity gains. Historically, we see these about every 15-20 years, and it’s that time again.

Texas Instruments in Dallas started the integrated circuit industry in 1958 when Jack Kilby put two transistors on a single piece of silicon. SPICE simulation was the big breakthrough around which the first EDA tools emerged. Gate-level abstraction came along and from there we have years of incrementally improved productivity, enabling designers to create chips. When chips grew to more than ~1 million transistors, incremental productivity enhancements were not enough to keep pace. That’s when RTL design and synthesis came along, and designer productivity changed from 200 gates a week to 2000 gates a week. What was remarkable is that the phrase “innovate or die” played out in front of the world. Designers that chose to learn RTL and synthesis thrived, and those that didn’t found other work.

Since then, we’ve seen continued evolutionary advancements built around this fundamental change, but designers are running into a wall. AI technology gives the opportunity to overcome this generation’s design challenges, but we have to overcome the structure of things of the past and not just optimize the old approaches. It gives us the opportunity to think differently and expand the scope of what is possible. It’s all about team productivity. It’s about the pace of technology innovation, taking a leap forward, enabled by AI productivity.

Cadence Cerebrus Intelligent Chip Explorer

Last year, we launched the biggest, baddest AI in EDA technology called the Cadence® Cerebrus Intelligent Chip Explorer. It’s a revolutionary product that provides both optimized PPA and productivity benefits. Users need fewer engineering resources to do the same task with Cadence Cerebrus versus traditional flow management. But the big win is that it frees up engineering bandwidth and enables the creation of many more and larger products that are more technically complex and more sophisticated than ever before.

Figure 1 – Electronic Design Assistance Systems (EDAS)

At Cadence, we characterize AI in EDA solutions on a similar scale as is used for advanced driving assistance systems (ADAS). You might call it electronic design assistance systems (EDAS)—see Figure 1. Real transformation comes at level 3 and above. Cadence Cerebrus is a level 3+ solution that performs like a “robot” design implementation engineer on your team—see Figure 2. First, it is fully integrated into your production environment to deliver tapeout-quality designs. Just like an engineer, Cadence Cerebrus can be given blocks for optimization with instructions on the target PPA goals along with a list of design parameters that can be changed to meet these objectives. Then Cadence Cerebrus efficiently utilizes a pool of compute resources to systematically drive the design to the PPA goals. 

Figure 2 – Cadence Cerebrus Intelligent Chip Explorer’s Level of Autonomy

This Generation’s Workforce Multiplier

There are ample data points that Cadence Cerebrus can optimize designs better than engineers. What may not be clear is the incredible productivity it enables. Right from the start, Cadence Cerebrus produces better results. Initially, the Cadence Cerebrus timeline is about the same as the engineering team. The difference is the Cadence Cerebrus users are simply checking on progress… while they do other work in parallel—that’s already a near 100% productivity gain.

And Cadence Cerebrus is learning the entire time it is working. For subsequent projects, Cadence Cerebrus gets more optimal results in a shorter timeline through transfer learning. Ultimately, the force multiplier is limited only by how fast the team can start projects and how many compute resources are allocated to each. These are examples of friendly AI robots doing great work to complement the skill set of the design team.

Customers have unique production flow environments for RTL-GDSII implementation and signoff that help organize design collateral, manage optimization, and facilitate status reporting. These AI robots need to work within these production environments, just as a human engineer does. Key elements that make Cadence Cerebrus production-ready include:

• Seamless and quick integration into the customer’s existing production full flow, not just an experimental reference flow
• Transfer learning leverages the training performed on one design to be reused on similar designs with fewer resources and time required to meet PPA objectives

Conclusion

While most people are debating the task success and optimization benefits of applying AI in EDA, we are focusing on the productivity game-changer. Using the EDAS scale is a way to judge the order-of-magnitude productivity impact a particular AI application will provide. AI-enabled designer productivity is the “evolve or die” opportunity of our generation that you MUST go for.