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Bonjour!

Does your design require converting an electrical signal to a real number?

If yes, let me explain how you can do so using the Verilog-AMS standard language. In this post, I will present three methods and compare them. Looking at the comparison, you will then be able to select a method that best suits your application.

Let us consider that the following symbol of a model requires an electrical to real number (E2R) conversion.

I’ve named the model as E2R_conv and it has:

- One electrical input
- One RNM output
- One logic output that generates a clock signal event to monitor when the E2R conversion is operating.

### Method #1: E2R Model Conversion Based on Electrical Solver Timesteps

In the first method, the idea is to execute an E2R conversion at each analog step of the electrical solver. Then, inside the analog block, we will generate a kind of clock using the real aevent variable. The aevent value is initiated at 1 and at each electrical solver step it is multiplied by -1. The variable aevent toggles iteratively between +1 and -1.

In the event solver always block, I’ve used a cross-event detection each time aevent values cross 0. This is done using always @(cross(aevent,0,`TTOL ,`VTOL )). The cross-function generates events for the synchronization between the electrical and digital solvers. Finally, we will create the drivers of the clk output and the x output values using the assign statement. Because x is declared as a wreal data type: assign x=rx; it will create a wreal driver.

This method plots the following waveform:

Here,

- The red color represents the electrical input, which is a sinus voltage.
- The yellow color represents the E2R conversion.
- The green color represents the clock signal event to monitor when the E2R conversion is operating.

This E2R conversion could generate many breakpoints for executing the conversion when you simulate a complex SoC and the electrical simulator needs to compute small timesteps to solve the nonlinear differential equations accurately.

### Method #2: E2R Model Conversion Based on Constant Periodic Sampling Clock

The second method is to generate a sampling clock, operating at a constant period equal to ts, within the event solver. Inside this always block, we will probe the input electrical signal with rx=V(e).

This method plots the following waveform:

Here,

- The red color represents the electrical input, which is a sinus voltage.
- The yellow color represents the E2R conversion.
- The green color represents the clock signal event to monitor when the E2R conversion is operating.

This E2R conversion could generate periodic breakpoints for executing the conversion. The Shannon sampling theorem reminds us that the sampling clock frequency should be at least two times larger than the frequency of the input electrical signal.

### Method #3: E2R Model Conversion Triggered by a Delta Variation of the Electrical Input

The last method is to generate the event solver only when the input signal value variation exceeds the user parameter vdelta. In an always block, we use the absdelta function to input electrical signal probed with V(e).

This method plots the following waveform:

Here,

- The red color represents the electrical input, which is a sinus voltage.
- The yellow color represents the E2R conversion.
- The green color represents the clock signal event to monitor when the E2R conversion is operating.

### Common Errors

**Method #1**: Forgetting one of the cross tolerances (the time tolerance or the expression tolerance).**Method #2**: Defining a sampling period that is too large versus the electrical signal period. The Shannon Theorem states that it should be at least two times smaller than the expected smallest period tone of the electrical input signal.**Method #3**: Using a vdelta value larger than the expected delta variation of the electrical input.**Methods #1 and #3**: Forgetting to define the VTOL and TTOL tolerances variation. It is important to define them because each simulator could have different definitions.

### Comparison of the Methods

**Method#1**: This method has a disadvantage that it usually defines a very large number of breakpoints in the electrical solver for the E2R conversion.**Method#2**: In this method, you will need to know in advance the maximum input signal frequency to optimize the sampling period ts according to your application requirement. This conversion may be inefficient for the electrical DC, square, or rectangular waveforms.**Method#3**: This method triggers the electrical conversion only when a vdelta variation is observed on the electrical input. This conversion may be efficient for the electrical DC, square, or rectangular waveforms.

### Conclusion

Usually, a mixed-signal engineer would prefer **method#3** because it provides the advantage to adapt itself on different signal frequency. The conversion is triggered by the vdelta value. You can consider it like an LSB (Least Significant Bit) of an analog to digital converter. Also, the Cadence E2R connect modules use a similar method.

The concepts presented here could be reused for connect module creation with the Cadence SystemVerilog-AMS compiler delivered with Xcelium.

Now that the three methods are described, choose one of them. Wishing you a happy experience with Spectre AMS Designer and Verilog-AMS or SystemVerilog-AMS modeling of E2R conversion!

*~ Andre Baguenier*

### Related Resources

For more information on Cadence circuit design products and services, visit www.cadence.com.

### About Start Your Engines

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