Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.
Verification Suite Related Products A-Z
Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.
Full-Flow Digital Solution Related Products A-Z
Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.
Overview Related Products A-Z
Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.
Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.
An open IP platform for you to customize your app-driven SoC design.
Comprehensive solutions and methodologies.
Helping you meet your broader business goals.
A global customer support infrastructure with around-the-clock help.
More Support Log In
24/7 Support - Cadence Online Support
Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.
Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.
The Cadence Academic Network helps build strong relationships between academia and industry, and promotes the proliferation of leading-edge technologies and methodologies at universities renowned for their engineering and design excellence.
Participate in CDNLive
A huge knowledge exchange platform for academia to network with industry. We are looking for academic speakers to talk about their research to the industry attendees at the Academic Track at CDNLive EMEA and Silicon Valley.
Come & Meet Us @ Events
A huge knowledge exchange platform for academia. We are looking for academic speakers to talk about their research to industry attendees.
Americas University Software Program
Join the 250+ qualified Americas member universities who have already incorporated Cadence EDA software into their classrooms and academic research projects.
EMEA University Software Program
In EMEA, Cadence works with EUROPRACTICE to ensure cost-effective availability of our extensive electronic design automation (EDA) tools for non-commercial activities.
Apply Now For Jobs
If you are a recent college graduate or a student looking for internship. Visit our exclusive job search page for interns and recent college graduate jobs.
Cadence is a Great Place to do great work
Learn more about our internship program and visit our careers page to do meaningful work and make a great impact.
Get the most out of your investment in Cadence technologies through a wide range of training offerings.
Overview All Courses Asia Pacific EMEANorth America
Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.
Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.
Exchange ideas, news, technical information, and best practices.
The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information.
It's not all about the technology. Here we exchange ideas on the Cadence Academic Network and other subjects of general interest.
Cadence is a leading provider of system design tools, software, IP, and services.
Get email delivery of the Cadence blog featured here
Adventures in Backdrilling
For the past 15 years or so, routing high-speed interfaces handling 5Gbps or higher have become more common in many electrical designs. Transitioning high-frequency signals between layers can greatly affect signal integrity when a portion of plated through-hole (PTH) is left unused, forming an electrical stub. In general, these stubs are a source of impedance discontinuities and signal reflections, which become more critical as data rates increase.
What options do I have to eliminate the electrical stub?
• Use a board fabrication process called backdrilling, sometimes referred to as controlled depth counter-boring.• Carefully plan/restrict the high-speed interface routing to certain layers to minimize the stub effects. • Use Blind, Buried and Micro vias technologies for routing high-speed signals which has its share of limitations, concerns and added fabrication costs while not addressing press fit connector pins which commonly require backdrilling to eliminate the electrical stub.
In the early years, the fabrication vendor would identify backdrill opportunities based on critical net list and make all the appropriate adjustments.
Introducing a backdrill process to a design can sometimes be a nightmare to manage and requires working very closely with your fabrication vendor. The fabrication vendor will remove as much stub as possible on the identified high-speed signals, adjusting features at each backdrill location and verifying copper clearances due to the increased backdrill size to maintain design integrity.
To ease a transition to a more streamlined process, a stable foundation was developed in Allegro 15.7 to reduce the post processing of data at the fabrication vendor.
As a previous customer, I was part of the Allegro® PCB Designer 15.7 Beta Test Team in late 2005. I was very excited to see/test the new Backdrill solution inside of Allegro. The functionality pushed Allegro to a higher level by allowing designers to identify nets that require Backdrilling and apply several component and pin properties to influence the design analysis to identify backdrill locations. Locations were identified in the Backdrill report, marked by special backdrill figures/legends for documentation and accompanied with manufacturing NCDrill files of backdrill locations for each specific depth. Even with these enhancement there was still a number of manual steps to ensure the design integrity is maintained (supporting multiple padstacks for backdrill locations, manual backdrill keepouts and backdrill size adjustments at the fabricator)
As time went on, it was clear that further enhancements would improve the process by providing functionality to not only analyze design but also adjust features at the backdrill locations along with generation of a complete manufacturing data package to streamline the fabrication process.
Cadence worked with fabricators and customers to fine tune the existing solution to not only remove most of the post-processing steps by the fabricator but also enhance several areas of the tool in support of the backdrill process. As a member of Product Engineering, I was able to influence the functionality based on my own past customer experiences as well as gathering feedback from our customers.
Typical Backdrill Location
This new enhanced backdrill solution takes all of the guess work and stress associated with introducing Backdrilling in a design. No more increased Non-Recurring Engineering (NRE) charges at the fabricator, no more escalating costs associated with introducing different via and build-up technologies. Lastly a more complete manufacturing data package with backdrill data information contained in IPC-D-356 and IPC-2581 along with full documentation communicating backdrill intent to the fabricator.
Backdrill Demo Reel
10 Top Reasons to Move Up to Allegro 17.2-2016 ReleaseWhat’s New in Cadence® Allegro® 17.2-2016 Release