Available on Demand: Tackling the Complexity of Next-Generation IC Packaging

Learn how Cadence is addressing the challenges of complex IC packaging design and view real use-case scenarios in an on-demand webinar presented by the Northeast Microelectronic Coalition (NEMC), a collaborative organization driving innovation in U.S. microelectronics.

The high costs of moving to next-generation silicon nodes and the need to integrate additional high-density memories for AI-based applications are driving designers of system-level IC packages to better understand the impacts between integrated silicon or component blocks. This webinar provides valuable technical insight into system-level design and analysis of next-generation IC packaging using Cadence's in-design analysis (IDA) solutions. Signal integrity, power integrity (SI/PI), and thermal validation with Allegro X Advanced Packaging Designer, Sigrity X, and Clarity 3D Solver are integrated directly into Cadence PCB layout platforms, enabling engineers to obtain a real-time snapshot of the effects of placement and proximity on electrical performance early in the design process. This innovative approach uncovers problems that can be corrected before the final validation stage, cutting up to 50% of design respins.

NEMC offers free membership to those interested in advancing microelectronics. Visit their membership page.