Cadence OrCAD X and Allegro X 26.1 Is Now Available

The Cadence OrCAD X and Allegro X 26.1 release is now available from Cadence Downloads, delivering significant enhancements across PCB design, package design, system-level design, simulation, and analysis workflows. Here is a summary of the key updates.

Allegro X PCB Editor and Allegro X APD

• IPC-compliant footprint generation from an extensive library of standard templates, with support for automatic footprint regeneration.
• Dynamic shape editing through the new Dynamic mode, enabling real-time shape updates and visual feedback during editing.
• Component-level Design for Assembly (DFA) checks directly within the layout environment.
• Enhancements to X AI routing technologies and new X AI Power/Ground Generator, improving routing productivity.
• ECAD-MCAD co-design workflow enhancements that streamline collaboration workflows.
• System-level design exploration in 3DX Canvas, with support for multiple boards and system connectivity in a unified 3D environment.
• Simplified daisy-chain creation and editing for package designs.
• SPICE-compatible RLGC models for advanced analysis workflows.
• Parameterized structure creation and reuse for evaluating high-speed design alternatives.

Allegro X System Capture

• System-level design enhancements, including support for 3D system exports and MCM board integration.
• Integrated analysis enhancements in Layout Mode, including RLGC model extraction and LayoutLink-based reflection analysis workflows.
• Reusable reliability parameter libraries for consistent application of validated reliability data across projects.
• Preservation of Pulse custom variables in project archives to support design handoff and collaboration workflows.
• Productivity improvements through schematic Minimap navigation and workspace window stacking.
• Enhanced differential pair creation using Constraint Manager capabilities.
• Improved pin delay import workflows with automatic data detection, validation, and pre-import review capabilities.

• Enhanced module support and streamlined module management workflows for more efficient selection, management, and reuse of module instances.
• Enhanced measurement capabilities for more accurate point-to-point and multi-segment distance measurements.
• Customizable Heads-Up Display (HUD) and cursor settings that improve visibility, readability, and navigation.
• Flexible pin renumbering capabilities that accelerate footprint creation and updates through support for multiple numbering patterns, numbering formats, and direct pin editing.
• Net Override and Rule Set views that simplify constraint management by making it easier to identify overrides, enforce constraint inheritance, and manage net-specific design rules.
• Improved visibility controls, streamlined layer navigation, and faster access to display views that enhance design productivity.

PSpice and PSpice Advanced Analysis

• Persona-based simulation configuration for faster simulation setup and improved consistency across projects.
• Additional component libraries from Murata and TAIYO YUDEN, expanding available simulation content.
• Intelligent, condition-based model and subcircuit selection for more flexible and adaptable simulation workflows
• Ambient temperature-based resistor derating for enhanced stress (smoke) analysis workflows.
• Enhanced high-frequency resistor thermal noise modeling with quantum-corrected calculations.
• Generic MATLAB and Tcl measurement functions for advanced custom analysis and verification workflows.

Sigrity X Aurora and Topology Workbench

• Signal behavior and analysis improved across multiple connected PCB and package designs.
• Multi-design reflection analysis enhanced with reusable System Configuration and LayoutLink files.
• DDR measurement reporting optimized for next-generation memory technologies through support for LPDDR6 and HBM4.
• Serial-link validation accelerated with multi-channel analysis, comprehensive channel characterization, and PCI Express® Gen 7 compliance support.
• Waveform review and debug enhanced with advanced measurements, curve filtering, CSV export, enhanced result management, and the new Grid Curve Viewer for side-by-side waveform analysis.
• Circuit simulation and analysis streamlined with direct generation of SPICE-compatible RLGC circuit models from layout structures in the IME workflow.
• Complex system modeling simplified with support for IBIS-Electrical Module Description (EMD) models, linear buffer models, and automatic Broadband SPICE model extraction.
• Signal and memory-interface validation streamlined with transient circuit simulation directly within Serial Link Analysis and support for simultaneous read/write cycle simulations.

For complete details, refer to the What's New documentation for release 26.1 and the accompanying README_CCR.txt file on the Cadence Downloads site.

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Allegro Release Team