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Tanushri Shah

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CadenceTECHTALK: Solution for 3D-IC Interposer Signal Integrity

• Less than one minute read

3D-IC design requires early analysis of thermal properties, power delivery, and signal integrity. This CadenceTECHTALK goes through the process of simulating heterogeneously integrated chiplets. You’ll be able to learn about the integrated workflow that begins with silicon design data being accurately modeled with 3D FEM extraction.

A slide from the CadenceTECHTALK titled 'From the Chip Through to the System'

Gary Lytle, product manager director at Cadence, talks about Cadence’s multiphysics simulation and analysis offerings, namely Clarity, Celsius, EMX Planar, and Sigrity. The presentation talks about how these tools are used together to simulate and analyze signal integrity for 3D-IC interposers. Kanchan Vaidya, principal product engineer at Cadence, later talks about interposer multiblock analysis and Clarity tools.

The Cadence Clarity 3D Solver has the unique ability to efficiently import and solve complex structures, including degassing holes. Accurate interconnect models can then be cascaded with IBIS I/O models for end-to-end signal integrity analysis and confirm that high-speed signals meet compliance testing. Watch the latest CadenceTECHTALK, Solution for 3D-IC Interposer Signal Integrity, to learn more about how Clarity is used for multiblock analysis. Learn more about Clarity 3D Solver here.