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Shirin Farrahi
Shirin Farrahi
26 May 2020
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BoardSurfers: Allegro In-Design Coupling Analysis: Crosstalk Mitigation without Models

BoardSurfers: Cadence Allegro BlogJust as social distancing minimizes human contact to prevent the spread of disease, PCB spacing constraints minimize coupling between traces to prevent crosstalk problems for drivers and receivers. In cases where a safe distance cannot be maintained, wouldn’t it be nice to have a very quick, accurate test to provide additional peace of mind? The Allegro® In-Design Analysis Coupling Workflow provides a perfect method for testing the effectiveness of spacing constraints or the risk when these constraints can’t be met. The Coupling Workflow powered by the Sigrity hybrid solver makes it easy for anyone with Allegro to run analysis on all nets of a routed board without the need for external tools, lengthy simulations, or complex IBIS-AMI driver and receiver models from chip vendors. The results are based on the full cross-sectional geometry and include coupling from different layers of the board. Coupling coefficients can be overlaid directly on the PCB canvas making it easy to adjust routes to correct for coupling issues.

The DDR signal bus shown here generally has coupling coefficients within an acceptable range with a few exceptions where traces are passing over a reference plane gap. The red segments on the canvas are easy to identify, and the dominant aggressor is listed for each segment in the results table or as a datatip on the canvas. By moving traces away from a reference gap, increasing their spacing, or making sure they don’t overlap on adjacent layers and then re-running the Coupling Workflow, designers can quickly ensure they are reducing trace coupling in their design. PCB designers can ensure their routes have minimal crosstalk without the need for a signal integrity expert or external tools. In addition to viewing results on the canvas, coupling coefficients can be sorted and filtered in a table with summary and detailed views. Results can easily be exported as a CSV file, making it possible to quickly create post-layout reports and share your design details outside of Allegro.

Click here to watch a short demo of the Coupling workflow in action.

You might be interested in the following links:

  • Sigrity Aurora: Traditional signal and power integrity (SI/PI) analysis for pre-, in-design, and post-layout PCB designs.
  • Allegro Right First-Time Design: Constraint-driven design with an integrated layout and analysis solution to help avoid making mistakes.
  • Sigrity SPEED2000: One tool to perform electrical rule checking, interconnect model extraction, signal integrity (SI) and power integrity (PI) studies, and design-stage electromagnetic interference analysis.
Tags:
  • PCB SI |
  • PCB design |
  • Allegro |