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Placing component leads accurately as per the datasheet is an important task while creating a package footprint symbol. As the pin pitch goes down, the size and location of the component lead play a crucial role in the assembly of the components. The leads and pin pads must align to ensure proper connectivity and adhesion. If the footprint symbol is not carefully created, there will be discrepancies in the design, such as the lead does not pass through the pin hole or the SMD lead pads do not have proper pad geometry to solder the leads properly. These defects in the design are caught only when the board is being manufactured and requires a respin, increasing the turnaround time.

Manufacturing issues due to incorrect lead placement can be detected early using the next-generation Cadence® Allegro® Layout Editors powered by the DesignTrue DFM technology. You can define DFM rules while designing the board and get real-time feedback to validate the manufacturability. Finding and fixing lead-specific errors early in the design cycle saves you both time and cost.

Allegro PCB Venture and Allegro Enterprise PCB Designer Suite licenses offer a set of component lead checks that you can choose for DFM analysis. 

Setting Up Lead-Specific DFM Checks

To ensure that the board is designed properly for assembling the components, first, specify the DFM rules for your design. You can set up these rules within Constraint Manager in the Manufacturing ─ Design for Assembly ─ Component lead worksheet.  

The best way to assign Component Lead checks is to create a DFA CSet and apply it to the leads in your design.

In the Analysis Modes dialog, you can enable or disable a check and view information about it by clicking the info icon. You can set rules for lead-to-hole clearance, spacing between paste mask pad and lead, minimum ball diameter, and so on, as shown in the following image.

To use the DFA lead checks, you first need to define the lead for the pins. The Allegro layout editors provide the Lead Editor feature that enables you to quickly add various types of industry-supported pin leads to symbol pins. Once you define the leads in Lead Editor, you can also graphically visualize the contact area of the physical leads of the pin in the design canvas and verify the various lead assembly issues while placing the components in the design.

Assigning Pin Leads in Lead Editor

In Allegro PCB Editor, choose the Setup ─ Lead Editor menu to open the Assign Pin Leads dialog to add component lead contact area information.

The Assign Pin Leads dialog displays all the footprints used in a design or a library under the Available packages section. You can filter this list by name to find a footprint symbol.

Selecting any package populates the available pins under the Pins section. The Assign leads drop-down list shows a list of supported lead types. To know more about each type, you can select any lead type from this list and read its description in the Help section. Once you create a lead you can graphically preview the lead contact area in the pin in the Quick View section.

To assign an appropriate lead to a pin, review the datasheet to find the lead type and the dimensions of the lead. For example, here is a datasheet sample showing package dimensions for the leads provided by the component vendor.

The above datasheet is from Micro Commercial Components.

To apply or change the lead assignment, choose an appropriate lead type from the Assign leads drop-down list. In the Parameters section, define the lead dimensions, width, and height of the Contact-figure per the datasheet. To position the leads off from the center of the pin, specify the X- and Y- offsets from the pad center.

Similarly, Define the lead information for the rest of the pins in the package.

The lead geometries defined through Lead Editor are saved under the PACKAGE_GEOMETRY/COMPONENT_LEAD class and subclass. The lead geometries are also saved as part of the package symbol association. When moving or mirroring a symbol, the leads are also moved or mirrored along with the symbol to the respective placement layers. The lead geometries are associated with the symbol (.dra) files and can be reused in other designs by exporting the symbols.

Verifying and Fixing Component Lead Errors

The DRC engine of the layout editor consistently runs in the background and verifies component lead checks for each lead assignment to a pin and reports a violation if an error occurs. You can review lead-specific violations in the design canvas in the Show Element window.

You can also review component lead DRC errors through DRC Browser. It is a faster way of reviewing all the DRC errors as it lists all violations for each rule in a single window.

Designers can optimize the design by running these in-design component lead DFM checks at their end before sharing the data for manufacturing. As I said before, you need to move to Allegro PCB Venture or Allegro Enterprise PCB Designer Suite to use these component assembly checks. You can reach out to our support team for any help with updating your licenses.

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