How to Use AI to Optimize Your Power Delivery Network

Modern power delivery network (PDN) design poses numerous challenges. Traditionally, designers rely on target impedance analysis—a widely used and effective starting point for ensuring power integrity (PI). While its simplicity and historical success make it appealing, in today's high-speed, high-density systems, its limitations are becoming more apparent with faster transistor switching and increased current demands.

Jared James, product engineer architect at Cadence, presented at EDI CON Online 2025 a new methodology using a target objective that considers both cost and performance. Cadence Optimality Intelligent System Explorer, along with Sigrity X SystemPI, is leveraged to determine the ideal combination of decoupling capacitor (decap) values and empty locations to achieve acceptable PDN performance at the lowest possible cost.

Traditional Target Impedance Analysis

The typical target impedance flow follows these steps:

1. Define power requirements by determining the core voltage and maximum transient current for each power rail and define acceptable voltage ripple (usually 3-5%)
2. Calculate target impedance:
   
   
   
   
3. Simulate PDN impedance using software tools to simulate the impedance of the PDN across frequency and plot impedance vs. frequency
4. Compare to the target impedance by overlying the target impedance line on the impedance plot
5. Optimize the decoupling network by adjusting capacitor values, quantities and placements, adding low-ESL capacitors for high-frequency noise, and using bulk capacitors for low-frequency transients
6. Re-simulate and iterate
7. Validate with time-domain simulations and compare with voltage ripple specifications

This flow has several limitations, including oversimplification of dynamic behavior, frequency range ambiguity, capacitor anti-resonance, and cost and space tradeoffs that can trigger performance vs. practicality issues. The focus of this paper is to improve the validation in Step 7.

The Cadence Sigrity X SystemPI/Optimality Explorer Methodology

The new Cadence methodology leverages Sigrity X SystemPI, a model-based topology environment that has been adapted for impedance analysis (AC), IR drop analysis (DC), and time-domain power ripple and transient behavior. System PI integrates models from the chip, interposer, package, and PCB, while extraction tools like Voltus IC power integrity solution and Clarity 3D Solver help build these models.

SystemPI works with the Optimality engine, which utilizes a novel reinforcement learning technology that significantly reduces the number of individual simulations needed, especially for high dimensional complex SI/PI and RF synthesis applications. The primary advantage of Optimality is efficiency; it achieves optimized solutions by evaluating objective functions sparingly, allowing users to obtain accurate optimized PI results faster.

In this flow, a SystemPI testbench has been built with various design parameters, including decap models and the number of decaps at each position. Once the simulation setup is complete, Optimality explores the full design space by running targeted simulations. It analyzes each result, updates design variables based on a defined objective function and constraints and iteratively refines the model. This process enables Optimality to adjust decap values and constraints efficiently, ultimately producing an optimized design ready for signoff.

The primary advantage of Optimality is its efficiency in that it evaluates objective functions just enough to find accurate, optimized results quickly, which significantly reduces the number of required simulations, This is especially valuable in high-dimensional, complex design spaces.

Test Case Demonstration

The EDI CON talk presents a test case highlights how SystemPI and Optimality work together to streamline PDN design. As a demonstration of the Optimality engine in the SystemPI flow, a test case was created to optimize the decap values of multiple decap positions using time-domain simulations. The objective function is to minimize the initial undershoot and the number of needed decaps simultaneously. The below image shows the test case setup.

Given a list of possible decap values, find the decap values that provides the lowest undershoot from a die current step of 1A. Simulation results showed a reduced number of needed decaps while exceeding the undershoot spec of 5% (50mV).

The plot below illustrates the simulation results. Each downward step represents a new simulation that produced a lower objective value than the previous best. While only the updated points are shown, intermediate simulations can be displayed if needed. The first ~57 simulations were run randomly to build a diverse sample space, which is known as the exploration phase. Around simulation 58, the algorithm began balancing exploration with exploitation, refining its search based on prior results. From that point, Optimality iteratively ran simulations, updated the model, and adjusted design parameters until either the maximum of 200 simulations was reached, or an optimal solution was found. In this case, the process concluded before reaching 140 simulations.

The next figure compares two scenarios: the red curve represents the worst-case condition with all decap positions left empty, while the green curve shows the optimized result.As you can see, the optimized design significantly reduces power ripple compared to the baseline. While our primary measurement focused on initial undershoot, the tool can easily be configured to target other metrics—such as minimizing ripple beyond the initial transient—depending on design goals.

Conclusion

The optimized result exceeded the 50mV undershoot spec while reducing the number of decaps by four. At simulation index 96, the power ripple was just under 18mV, with four blank decap positions, demonstrating both performance and cost savings. Achieving this result with fewer than 200 simulations out of over two trillion possible combinations highlights the efficiency and effectiveness of the Optimality engine.

To learn more about this revolutionary new methodology, access the EDI CON 2025 on-demand webinar. Visit our product pages to learn more about Optimality Intelligent System Explorer, Sigrity X SystemPI, Voltus IC Power Integrity Solution, and Clarity 3D Solver.