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BoardSurfers: Footprints for Silicon - Two Steps to Creating PCB Footprints

27 Mar 2020 • 3 minute read

BoardSurfers: Cadence Allegro BlogLongfellow's metaphorical footprints on the sands of time is more profound and eternal no doubt but a footprint for silicon (a form of sand isn't it?) is as important for PCB designers. So, here we will list the steps to create a footprint for PCB parts.

So let's start at the beginning. To create a design or a board, you need to ensure the schematic symbols and PCB parts you are going to use are available in your libraries. Although the schematic editors and board layout tools have their own libraries and your organization will have a repository of part libraries, you might need to create or customize some of the parts you are going to use in your design. And, the first thing you do is create footprints. Well, it is a two step process:

  • Create padstacks
  • Define package outline and place padstacks 

The best way forward is to take an example. So, for now, you will create a footprint for a synchronous step-down regulator. You will use Pad Designer and Allegro® PCB Editor to create the footprint. We will take up the next step of creating a schematic symbol in a future post.

Creating Padstacks

You will create a padstack and define the package outline using information from a downloaded datasheet for LTC3618. The Package Description section of the datasheet is of interest to you while creating the footprint.

You will create a single-layer, surface mount padstack, with a regular pad, a soldermask pad, and a pastemask pad for the assembly process.

Before creating the padstack, consult the datasheet to determine the dimensions.

The red rectangle on the bottom-right is mine to emphasize the important dimensions. 

The dimension of each pad in millimeters is 1.05 by 0.45. The soldermask pad should be bigger than the regular pad. Therefore, you can specify it to be 1.40 by 0.80 millimeters. Your organization or you yourself might have empirical formulas to determine the actual measurement. 

You also see a pin on the top. Well, you will place that pin manually.

Now that you know the dimensions, start Padstack Editor. From then on it is an easy task with the tabbed interface designed to reflect how you design.  Just ensure the summary looks like what is shown below.

Padstack Editor Summary

You are done with your pads so move on to designing package outlines and placing the padstacks.

Defining Package Outline and Placing Padstacks

You will use the Package Symbol Wizard to easily create a package symbol.  If you are a beginner, the wizard will assist you to create a simple package symbol. And if you are an experienced designer, it will enable you to create a base package symbol that you can modify into a more complex symbol.

Now is the time to refer to the package description section of the datasheet again.

You have to translate the dimensions to what the Package Symbol Wizard needs. For this example, a SOIC package, the following figure shows the dimensions of interest.

So, for now, you are interested in the following:

  • The number of pins (N): This package has 25 pins, out of which one pin is on the top of the package. You will create the 24 pins on the two sides using the Package Symbol Wizard. You will place the top pin manually.
  • Lead pitch (e): The lead pitch is 0.65 mm.
  • Terminal row spacing (e1): The terminal row spacing derived from the datasheet is 7.65mm.
  • Package width (E): The package width is derived as 4.55mm.
  • Package length (D): The package length is derived as 7.88mm.

The derivations might differ slightly depending on your actual design requirements.

Now, it's all easy. Open Allegro PCB Editor, choose File – New, and then select Package symbol (wizard) for Drawing Type. Rest is just selecting the right options and entering the correct values.

Well, one task is left. Remember, there is one pin you decided to place manually on top of the symbol? Well, choose Layout – Pins, then. Fill in the Options parameter based on the datasheet. 

And, if all went well, you should have something like this.

Save the DRA to generate a package symbol file (PSM). And, you are done!


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