BoardSurfers: PCB Electronics - Defining and Applying Physical and Spacing Constraints

In our last post, we looked very briefly at electrical constraints. That post was brief for a reason. Constraints need you to go slow at the beginning to ensure you go fast and smooth later. It needs reflection and thought. Although we had discussed what is a constraint and why we need it in the other post, we will do that again in this post. It doesn't harm to repeat but a gap in understanding might impair implementation.

So, if you get frequent calls from your fab houses or your customers regarding your product, or if your schematic, layout, and packaging engineers spend a lot of time exchanging notes about their requirements not being met, resulting in tedious rework of designs, or if you believe, like most of us do, that a product should do what it was designed to do, constraints are your friends. 

A constraint is a restriction or a rule that you apply on nets or Xnets in your designs.  An Xnet (Extended net), by the way, is two nets that are electrically connected through a passive discrete, usually a resistor. But why do you apply these rules, these constraints? Because you want to ensure you or anyone else in the design teams (schematic, layout, or packaging) do not do something with the nets in your design that breaks your intent. For example, say, you want the trace widths in a specific area in a layer to be of a certain width. So, you create a rule specifying that the trace width should not be more than or less than a certain value and apply it to the nets. Now you don't need to inform any present or even a future member of the innumerable other teams working on this design of your requirement. The application will remember and enforce the constraint. For the higher question as to why you have rules in the first place, the answer is simple, you want the product you're designing to behave as expected. For example, you might want a wide trace because you don't want to start a fire. 

What are the constraints we apply? Mainly electrical (as discussed the week before in our post), physical, and spacing. Today we will concentrate on spacing and physical constraints. There is a different set of constraints that cater to manufacturing issues discussed in an earlier post on Design for Manufacturability (DFM). 

The Cadence PCB constraint solution has Constraint Manager at the core, giving you the advantage of a consistent constraint management system across all design phases. 

Before we jump into how you define and apply constraints, let's clear up two more terms, PCSet (Physical Constraint Set) and SCSet (Spacing Constraint Set). A constraint set (CSet) is exactly that, a set of constraints. Instead of handling many individual constraints, you manage a CSet. A physical constraint is a rule that characterizes and constrains the physical characteristics of a net, say trace width, and a spacing constraint is a rule that specifies the spacing between two physical objects, say line-to-line spacing. Both sets of constraints apply to nets and Xnets, of course.

Customizing a Default CSet

When you create a new design in PCB Editor, you already have a CSet, the default one. If that CSet suits you (well, it might), just go ahead. But if not, you might want to change the values and you can do that too. Oh, but you can't delete a default CSet, by the way. 

The default CSet is a great convenience - you don't start from zero. Remember, constraints are not easy to manage and any help is good. So, open your board in a layout editor and choose Setup – Constraints – Physical or Setup – Constraints – Spacing, as the case might be, to open Constraint Manager. Then open the All Layers worksheet from either Physical Constraint Set or Spacing Constraint Set. Now, customize the default set by changing values per your own requirement.  For example, the default SCSet in a design uses 5-mil spacing clearances, but your design might require 8-mil spacing.

Defining a New CSet

Now that you have taken care of most of the nets by customizing the default CSets, let's get working on the nets that need physical or spacing rules different from the default ones.  Create new CSets  for these nets. You can create as many CSets as required in your design and, again, you do not start from zero. You can inherit from an existing CSet. Just right-click any CSet in the All Layers worksheet and choose Create.

Assigning CSet to Nets

If customizing and defining was easy, assigning CSets is even easier and as intuitive. This time open the All Layers worksheet under Nets. For one or more listed nets, specify the CSet by selecting it from either Referenced Spacing CSet or Referenced Physical CSet, as the case may be. You can select multiple nets or NetGroups and assign one CSet to all of them at one go.

The constraints on the nets or net groups change based on the constraints set in the CSet. These constraints are inherited by all objects in the nets or net groups. This is another advantage of the constraint system, the constraints follow inheritance and override.

I cannot but quote from what we have already talked about in our previous post "...you can use the powerful NetGroups concept to take full advantage of the inheritance and override features. Net Groups are a high-level abstraction of nets, buses, and so on. Constraint Manager fully supports these Net Groups from a constraint perspective. Create and apply constraints at the top-level Net Group object to propagate down through all levels of the Net Group. Adjust individual objects inside the Net Group, if needed."

Using Constraint Regions

What if you have a region on your board where you want to override the physical and spacing constraints of the nets entering that region? Say, a rigid-flex design? Or, a 5G design with special requirements as mentioned in an earlier post? Worry not. 

Use constraint regions to create special routing areas in your design. Simply draw a Region (Rgn), which is a bounded area of the design within which the different width and clearance constraints apply to all nets that cross the boundary. You can define a region by drawing shapes on a subclass layer in PCB Editor. Then, if you want to be even more specific within a region, constraint the region using a Region Class (RCls). The constraints on the nets of a Region Class are exceptions to the constraints originally applied to the region. A region is more generic; a Region Class allows more specific exceptions to be defined.

Conclusion

As you must have realized, with the right set of tools and features even a daunting task like managing constraints become manageable (pun intended). But, if you are like me and want to try out things, get your hand dirty, check out the Rapid Action Kit (RAK) on Physical and Spacing constraints. This RAK has labs covering each of the topics discussed in this post as well as two on defining differential pairs and differential pair constraints by constraints. You can download the database accompanying the RAK to perform the different tasks. 

Note: The above link can only be accessed by Cadence customers who have a valid login ID for https://support.cadence.com