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Shirin Farrahi
Shirin Farrahi

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BoardSurfers: Allegro In-Design Return Path Analysis: Find and Visualize Return Path Issues

26 Jun 2020 • 2 minute read

BoardSurfers: Cadence Allegro BlogReturn path issues are common and difficult to diagnose in complex printed circuit board designs. In the worst case, a signal could have no DC return path, and your circuit will be open at the lowest frequencies. In other cases, a poor return path can result in Signal Integrity issues. When the current must take a long path to return to its source, the loop inductance of the signal path increases. The larger inductive loops are in a system, the more likely those signals are to pick up noise from any other net in the system. Using the innovative Allegro® In-Design Analysis Return Path Workflow powered by Sigrity, you can quickly determine the quality of a signal’s return path and visualize where the return current is flowing directly on the Allegro canvas.

Some common return path issues are caused by a lack of ground vias, gaps in the ground plane, missing decoupling capacitors, or a reference to the wrong net. All these issues will show up in the Return Path Quality Factor table in the Allegro layout editor. The Quality Factor is calculated from a SigrityTm hybrid simulation of the signal and return planes to determine the inductance of the full loop. For signals with bad Quality Factors, an additional simulation can be launched to visualize the path that the return current is taking. Using this visualization, designers can quickly understand why the return path is non-ideal and remedy the issue.

In the example shown below, the highlighted signal was originally routed above a power net, meaning that the return current had to travel down to the fifth layer of the board to get to the ground plane. Using the visualization, this would be obvious since the highest return current density would be on the ground plane. By putting a ground patch on the power layer directly under this DDR bus as shown in the picture, the Return Path Quality Factor improves by almost a factor of two.

The Allegro In-Design Analysis Return Path Workflow has taken a complex analysis typically only possible with specialized tools run by experts and has put it in the hands of the PCB designer to resolve issues directly in-design.

Click here to watch a short demo of the Return Path workflow in action.

You might be interested in the following links:

  • SI/PI Analysis Integrated Solution for PCB Design: Advanced PI and power-aware SI tools that can be used throughout the design process for complex designs with stacked die and packages, higher pin counts, and greater electrical performance constraints.
  • SI/PI Analysis Point Tools: Cadence power integrity (PI) and power-aware signal integrity (SI) solutions for signoff-level accuracy of AC and DC power analysis and SI analysis for PCBs and IC packages.
  • Sigrity Aurora: Traditional signal and power integrity (SI/PI) analysis for pre-, in-design, and post-layout PCB designs.

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