• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. System, PCB, & Package Design
  3. BoardSurfers: Managing Minor Spacing DRCs Using Manufacturing…
Boopathy J
Boopathy J

Community Member

Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
CDNS - RequestDemo

Try Cadence Software for your next design!

Free Trials
17.4
BoardSurfers
EDA
PCB Editor
17.4-2019
Allegro PCB Editor
Allegro

BoardSurfers: Managing Minor Spacing DRCs Using Manufacturing Tolerances

25 May 2021 • 2 minute read

 While translating boards from different PCB design applications or changing design units in the later phase of a design cycle, a wide variety of mathematical round-offs may occur for geometric computations. As DRCs are logically computed, the DRCs created with minimal differences (for example, 0.01 mils) fall within manufacturing tolerances. Even when two traces running in parallel take a turn, they cause exceedingly minute spacing violations between their arced path. Such spacing violations are often waived off while reviewing the DRCs as they are considered insignificant. However, waiving off these spacing violations repeatedly is a time-consuming and frustrating task.

Well, to resolve these violations in one go, you can enable Design for Fabrication (DFF) checks integrated into Allegro® PCB Editor. You can define tolerance values for DFF copper spacing and mask spacing that apply to certain spacing checks to allow for manufacturing tolerance limits. Setting the manufacturing tolerance minimizes the need to review spacing violations that fall under manufacturing specifications; and eliminates the need to waive the DRCs.

Enabling DFF Tolerances Checks in Allegro PCB Editor

To set up the manufacturing tolerance, open the Analysis Modes dialog In PCB Editor:

  1. Choose Setup ─ Constraints ─ Modes.
  2. In the Analysis Modes dialog, expand Design for Fabrication checks and double-click the Manufacturing Tolerance Allowance option to open the DFM Global Tolerance window.

  3. Specify the allowable tolerance value for DFF Copper Spacing rules as suggested by the manufacturer and click OK.

    The tolerance values are always positive. If the value of spacing constraint between traces is 5 mils and the manufacturing tolerance is 0.01 mils, the DFF DRCs will be reported only if the spacing is less than 4.99 mils.


    Similarly, you can set the manufacturing tolerance for DFF Mask rules, which will be valid for spacing between two mask objects.

In the End

Incorporating manufacturing tolerances into the DRC generation process saves hours of design revisions and reduces turn-around time. In this post, we saw that setting up these tolerances is quite simple. If there are any changes in manufacturing specifications, you can modify the tolerance values and re-run online DRCs. That's the icing on the cake! The next time you review spacing DRCs, consider specifying manufacturing tolerance checks to save time and effort.

Do SUBSCRIBE to stay updated about our upcoming blogs. If there is any topic you want us to cover or any feedback to share, you can write to us at pcbbloggers@cadence.com.


CDNS - RequestDemo

Have a question? Need more information?

Contact Us

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information