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Community System, PCB, & Package Design  BoardSurfers: Allegro In-Design Reflection Analysis: Signal…

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Shirin Farrahi
Shirin Farrahi

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PCB design and layout
17.4-2019
PCB Signal integrity
Allegro PCB Editor

BoardSurfers: Allegro In-Design Reflection Analysis: Signal Integrity Simulations on the PCB Canvas

3 Nov 2020 • 1 minute read

 Reflections happen on Printed Circuit Boards (PCBs) whenever signals encounter an impedance discontinuity, so maintaining constant impedance along all interconnects is always desirable. But it’s not always possible to achieve this. In order to route a dense board, designers must vary trace widths, cross reference plane gaps, and change layers. To understand how much reflection will occur due to each of these discontinuities, the Allegro In-Design Analysis Reflection Workflow gives PCB designers the ability to run reflection simulations using IBIS models directly in the PCB canvas where they can diagnose and quickly fix reflection issues.

Reflections are inevitable in PCBs and are caused by the need for signals to change layers using vias, change the width in package break-out regions, and cross-reference plane gaps. They can also be caused by layout mistakes such as not connecting a termination component or failing to provide an adequate return path for a signal. In the Allegro In-Design Analysis Reflection Workflow, users run simulations using the Sigrity hybrid solver to find these issues and compare the relative impact of each on signal reflections. You can specify IBIS models for the driver and receiver or use the default models provided. As shown in the below example, we are seeing a negative ring back margin on the highlighted net meaning there is excessive ringing on our signal. This ringing could potentially cause the receiver to switch when it shouldn’t, causing a bit error. We see that the trace is routed in a gap between the ground and power planes. By moving the trace so it is routed over the ground shape, the ring back margin goes from -0.03V to 0.25V. The results can be exported to a spreadsheet to easily share outside of Allegro.

The Allegro In-Design Analysis Reflection Workflow has taken a complex signal integrity analysis that typically requires specialized tools run by experts and has put it in the hands of the PCB designer to resolve issues directly in-design.

Click here to watch a short demo of the Reflection Workflow in action.

You might also be interested in the following links:

  • Sigrity Aurora: Traditional signal and power integrity (SI/PI) analysis for pre-, in-design, and post-layout PCB designs.
  • Sigrity Advanced SI: Perform automated die-to-die signal integrity (SI) analysis in multiple modes.

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