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Jerry GenPart
Jerry GenPart

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What's Good About Cadence PCB Design and SI/PI Analysis Products? The 16.6 release has QIRs!

29 Oct 2015 • 2 minute read

I’m taking a brief detour from the usual product technical details this week to mention (and in most cases – remind people) that the Cadence PCB Design and SI/PI Analysis Products provide Quarterly Incremental Releases – or QIRs. You can find brief descriptions of what’s contained in each QIR here. Near the bottom of each main product section (Allegro, Sigrity, OrCad) there is a “What’s New” link. Selecting this will provide you more details about specific QIRs. Here’s the "What's New" link for Allegro PCB Editor.

While the word “incremental” denotes a small change, some of these QIR releases contain significant product technology advancements that are typically found in our major releases. We’ve provided QIRs for a few years now so that you can benefit from these new product features and enhancements on a more frequent basis instead of waiting for months or years before being able to use the capabilities.

I will be blogging about the details of the 16.6 QIRs over the coming weeks and months. I’ll start with the most recent QIR (QIR #9 or better known as 16.6–2015 Release) and work backwards to earlier QIR releases (QIR #8, QIR #7, … QIR #1). While this may seem odd, my goal is to relate the most current and impactful product capabilities first from the latest QIR so you can utilize these in your design environment. Some blog posts will contain just a brief list of product and flow features available in the QIR (with references to details on Cadence Online Support) and others will provide in-depth descriptions of functionality.

My goal is to provide you the most relevant product details so that you can achieve maximum efficiency and productivity.

Here are just a few topics I’ll be writing blog posts –

Allegro PCB Editor

  • Allegro PCB Designer Manufacturing Option (DFM Checker, Documentation Editor, Panel Editor)
  • Allegro Relational Rules Checker (running RAVEL rules)
  • Differential Pair Return Path Vias
  • Fiber Weave Effect - Zig-Zag Routing
  • Auto-Interactive Adjust Spacing
  • Auto-Interactive Swap Pins (Design Planning Product Option)
  • Productivity Enhancements (new shape editing mode, persistent snap and selection, island permanent highlight, and much more)


Allegro Design Authoring

  • Variant Editor enhancements (hierarchical variants, schematic editor dynamic viewing, capturing variants on the schematic)
  • Online Component Browser support for non-ADW projects
  • Tag-based ECSet Mapping


Allegro Design Workbench

  • Using Component Browser with Project Manager projects
  • ADW Server Error Logging and Notification
  • Enhancements in Library Import
  • Condensed Library Flow


Allegro FPGA System Planner

  • Managing Design Block Symbol
  • Generating an ASA Design
  • Enhanced Multi-Device Connections (Daisy Chain Connectivity)
  • Termination Reference Designator Support (OrCAD)


OrCAD Capture / PSpice

  • Enhancement in Learning PSpice
  • Enhancement in the Capture Start Page
  • New Simulation Macro Models for the Capture-PSpice Flow
  • VBIC Support added in PSpice
  • ADMS XML filters for Verilog-A to PSpice DMI Models Translation


SiP

  • Co-Design Die Editing in Symbol Edit Application Mode
  • Defining Variants
  • Replacing Via with Via Structure
  • Exporting Netlists
  • Degassing Enhancement of Void Clearance for Adjacent Layer Shapes

 

Jerry “GenPart” Grzenia


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