• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Blogs
  2. System, PCB, & Package Design
  3. What's Good About the Latest in DEHDL? The 16.6-2015 Release…
Jerry GenPart
Jerry GenPart

Community Member

Blog Activity
Options
  • Subscribe by email
  • More
  • Cancel
CDNS - RequestDemo

Try Cadence Software for your next design!

Free Trials
Cadence Design Systems
hierarchy
Allegro 16.6
DEHDL
Allegro Design Workbench
hierarchical schematics
SPB
Design Entry HDL
Design Entry
Grzenia
ConceptHDL

What's Good About the Latest in DEHDL? The 16.6-2015 Release Has Several New Enhancements!

9 May 2016 • 1 minute read

The 16.6-2015 Design Entry HDL (DEHDL) release contains a few new capabilities!

Read on for more details…



Read-only Sheet Import
In Design Entry HDL (DEHDL), the sheet import command now supports the import of schematic sheets in read-only mode. For details, see the Importing Designs section in Allegro Design Entry HDL User Guide.


Component Browser - ADW Mode
You can now access the Component Browser in two modes--the standard mode and the Allegro Design Workbench (ADW) mode. The ADW mode allows you access to a larger, and accessible-from-anywhere dataset, of components.

The ADW mode (also referred to as the online mode in the documentation), enables faster, free-text searches, provides life cycle functionality, preferred parts lists, alternate manufacture lists, and provides a shopping cart that allows you to search for parts that are selected or added to a design.

For more information, refer to the Using Component Browser section in Allegro Design Entry HDL User Guide.


Tag-based ECSet Mapping
User-defined tags in ECSets can be added to pins or components in a design prior to extracting a topology in SigXplorer. These tags can be used to schedule a topology and are used when the topology is applied back to the design.

ECSet mapping tags are also supported in the front-to-back flow between Design Entry HDL and PCB Editor.

For more information, refer to the Working with ECSet Tags section in Allegro Design Entry HDL - Constraint Manager User Guide.


Please share your experience using these new features.

Jerry “GenPart” Grzenia


CDNS - RequestDemo

Have a question? Need more information?

Contact Us

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information