The Allegro AMS Simulator (analog/mixed-signal) 16.6 release adds several enhancements to the Advanced Options dialog form. This enables the customizability of a PSpice simulation run, including control over convergence homotopy options, making worst-case analysis independent of RELTOL and enabling auto-convergence automatically in case of convergence failure. These options do not change the core behavior of the simulator, but provide the designer new ways to control the behavior at different simulation points.

Options have been added to the Advanced Analysis Options dialog box in the following areas:

--Bias-Point Convergence

--Integration Method

--Voltage Limiting

--Worst-case Deviations

--Max-Time Step Control

--Pseudo Transient

--Relative Tolerance*Read on for more details…*

Here are the new options available in the Advanced Analog Options form:

Convergence Improvement Options:

– Advanced Biaspoint Convergence Homotopies

– Integration method option

– Node Value Limiting

– Relative Tolerance

Accuracy Improvement Options:

– Worst-case control independent of RELTOL

– Behavioral sources TimeStep Control for sinusoidal functions

– MinStep independent of TSTOP

– 64-Bit Data accuracy

For the Biaspoint Convergence:

- PSEUDOTRAN
- Bias-point Convergence Enhancement
- Used when all other methods (STEPGMIN, STEPSOURCES) have failed

- ADVCONV
- Enables all convergence algorithms, viz. PseudoTran, StepGmin, and StepSources (ON by default)

- GMINSRC
- Enables StepGmin from inside of StepSources

- NOSTEPDEP
- Suppresses stepping of dependent sources during StepSources

- GMINSTEPS
- Maximum number of steps per iteration of StepGmin

- ITL6
- Maximum number of steps per iteration of StepSources

- PTRANSTEP
- Maximum number of steps per iteration of PseudoTran

For the Transient Convergence:

- METHOD = [TRAPEZOIDAL|GEAR|DEFAULT]
- Integration method to be used during Transient analysis
- Gear is more stable, so more often used in the default mode
- Trapezoidal is more accurate

- TRTOL
- Tolerance for integration error calculated during transient analysis
- A higher value implies more tolerance, so bigger time steps and reduced accuracy
- Can be useful to jump model discontinuities in case of fastswitching designs
- Default = 7

There are also new PSpice Options:

- LIMIT
- Absolute limit on data values calculated in PSpice engine during simulation
- Can be used in case of overflow errors
- Can also be useful for convergence failures in some simulations

- WCDEVIATION
- Deviation to be used for Worst-case analysis
- Default calculation for worst-case Delta is nominalValue * RELTOL
- If WCDEVIATION is specified, it gets modified to nominalValue * WCDEVIATION

- Deviation to be used for Worst-case analysis
- PROBE64
- 64-bit Probe data
- Increases resolution of probe
- Very useful for differential probes

- NOGMINI
- Suppress GMIN addition across current sources
- Gives more accurate results for very low current values

- BRKDEPSRC
- Sets automatic break-points for sinusoidal behavioral sources
- Useful for long simulations when default Max Time Step is too big

I look forward to your feedback!

Jerry “GenPart” Grzenia

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Hi Hans,

You can install the free OrCAD PCB Designer Lite DVD found on www.cadence.com/.../downloads.aspx This will allow you to open up Capture schematics and view them. There is a design size limit, but it should work for most designs.

Jerry G.

Is there a free Orcad schematic viewer like the Allegro pcb design viewer?

Thanks

Hans

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