What's Good About Schematic Drawing Standards?

This past week, there has been a very interesting discussion on the "icu-pcb-forum" Email alias. Most of the people have migrated to our Cadence Support forums, but there are still a few that use the "icu-pcb-forum" Email alias.

The topic - Schematic drafting practices.

There are some "veteran" designers (several with more than 25 years of experience) posting their perspective and company practices employed for how to interact with schematic design content. Some very good guidelines/standards are contained in the posts. I'd ask these folks to feel free and chime in here as well - and take credit for some key points below!

Here are some of the discussion highlights:

• Where can I obtain web URL links or other sources for good schematic drafting practices?
• It's tough to keep an up-to-date drawing standard. o Including "layout-pertinent information on the schematic" is important.
• "Remember to hide unnecessary pin numbers, like for resistors and other two pinned components."
• Tables, Tables, Tables! A Table of Contents, power/ground pins, test points.
• There was an "intense" discussion about power/ground pins being included on the symbols or embedded in the part (in the chips.prt file). There are advantages/disadvantages to each method. I'm curious - which method do you consider a "Best Practice" and why?
• I just have to include this one - it's amusing (IMHO)

"I had an engineer that insisted upon placing all like components on the same page.

- Page 1 thru 4 showed all the IC's

- Pg.5 transistors Pg.6 resistors

- Pg.7 capacitors And so on....

- He couldn't figure out why I was arguing with him. Go figure."

• Grids are important to control object locations and proximities.
• Here's a gem - "Print it out a 11 x 17 paper. Is it still legible? If not fix it."

Based on these discussions, I'd like to open this topic up to the greater PCB audience and dialog about the following:

• How do you maintain and communicate your drawing standards to engineers? All details need to be considered - schematic "flow", part placement (orientation), text font/height/location, naming conventions, etc.
• How much PCB/simulation properties do you add on the schematic? Are most kept in the Physical Part Table (PTF) files? Do you use symbol place-holder properties? This is in addition to the Constraint Manager properties that are commonly used.
• How much "table data" (e.g. table of contents, block diagram, spares list, mechanical information, power/ground data, etc.) do you include on pages before the schematic electrical content?
• How many companies consider schematic "style"/flow important? How many engineers use the Allegro System Architect/System Connectivity Manager table based approach? In other words, is the schematic content not nearly as important as the netlist derived from it?
• How many designers use the ANSI/IEEE style of graphical symbols? For examples, you can visit any of the "a" series libraries (those prefaced with the letter "a" in the library name - like a54lsttl, a74fast, etc.)? Are these required for just a small subset of designs you produce? How do the various groups (PCB Design, Manufacturing, Testing, etc.) react to the symbols?

As always, I look forward to our continued communication on this topic!

Jerry Grzenia