What's Good About Vias And The Allegro Router? SPB16.3 Has A Few New Enhancements!

A few new enhancements specific to vias in the SPB16.3 release of Allegro PCB Editor have been introduced. The are called use via region and stacked via support.

Use Via Region

Many times you need to restrict usage of specific vias in a region. Allegro PCB Router has been enhanced to allow via usage in a certain region.
The use_via rule has been enhanced to align with the Allegro via list functionality. The following objects support the use_via rule:

1.    region
2.    region net
3.    region class

Stacked Via Support

In the SPB16.2 version, stacking rules were only supported at the design level. The SPB16.3 release extends the via stacking rules to all hierarchy levels in Specctra. It also supports the exclusive microvia stacking capability provided in Allegro PCB Editor. 

Read further for more details ...

Use Via Region

The new physical rules look like the following:
circuit region <region_name> (use_via {[<padstack_id>]})
circuit region_net <region_name> (use_via {[<padstack_id>]})
circuit region_class <region_name> (use_via {[<padstack_id>]}) 

Specifying Vias for a Region

Via rules can be specified in the Allegro Constraint Manager.  Open Constraint manager > Physical > Region > All Layers and select the vias for regions. The rules specified in Constraint Manager are transferred to the Router. The rules are translated to a "do" file.

Reports

Use via conflicts should be reported as a type option to the 'report conflict' command:
report conflicts window (type use_via)
If any conflicts exist, they are reported according to the syntax:
#1: Incorrect Via Padstack Usage "VIA019" 

Stacked Via Support

Exclusive Microvia Stacking

Via rules can be specified in Allegro Constraint Manager.  Simply go to Constraint manager > Physical > Region > All Layers and select the vias for regions. The rules specified in Constraint Manager are transferred to the Router.

The above shown Pad-Pad Connect rule, if set to MiCROVIAS_MICROVIAS_ONLY, is translated to the Allegro PCB Router as below:
rule net A2 (stack_via exact microvia_only)
Syntax:
<stack_via_descriptor>::= (stack_via on | off | exact | any_overlap [microvia_only | bbvia_only])

on : Turns on stack_via, which allows vias to stack.
off : Turns off stack_via, which means vias cannot be stacked.
exact: This is default option; specifies that vias are placed coincidently on contiguous layers acting as a single vias.
microvia_only: Specifies that stacking is allowed for micro via objects only.
bbvia_only: Specifes that stack contains only bbvias.

If only the stacking rule values is on then stacking is allowed to any combinations of bbvia and microvia..

Example of layer rule particular layer:
define (class CLASS1 (layer_rule SIG1 (rule (stack_via on) ) ) )
The above rule means that bbvia and uvia stacking is enabled for layer SIG1 for class CLASS1.

Rule hierarchy for stack_via

In SPB16.2, Specctra was supporting via stacking rules only at the PCB level. SPB16.3 allows specifying the via rules at  most of the physical levels. The via stacking rule is applied to the levels in Allegro Physical rules hierarchy outlined below:

The highest prioirty is for a region class and the lowest is for design level.

Note:  xnet level is not supported and will not be translated by SPIF.

Stack via depth rules are specified in Specctra directly and not imported from Allegro. Depth rules are specified for objects (but not on layer level for objects).

The primary change in stacking via usage is on enabling the rule on layer basis.

Class A has the following stacking rules defined.

define (class A (layer_rule SIG1 (rule (stack_via on microvia_only) ) ) )
define (class A (layer_rule SIG3 (rule (stack_via on microvia_only) ) ) )
rule class A (stack_via_depth 3)

The above example enable microvia stacking only for ClassA on specified layers, while in earlier implementation you would need to enable stack_via rule for all layers.

Reports

Specctra reports have been enhanced to reflect the new functionalities. The rules report and the conflicts report have been enhanced as shown below.

Rules report: When via stacking is enabled for an object, it is reflected in the reporting. The possible values for the state are the following:

"off" – if via stacking is forbidden
“exact” – if any via type stacking is allowed
 "any_overlap" – if any bbvia/uvia coincident combination allowed
"microvia_only" – if microvia coincident combination allowed only
 "bbvia_only" - if bbvia coincident combination allowed only
 "microvia_only with any_overlap option" – if microvia coincident and non- coincident combination allowed only
"bbviawith any_overlap option" - if bbvia coincident and non-coincident combination allowed only

For a depth-based approach it looks like the following:
                 Stack Via = exact
                 Stack Via Depth = 3

Conflict reports: Stack via violations are reported in “Report Conflicts - Route” .
 

As always, I welcome your feedback on how you're using these new features.

Jerry "GenPart" Grzenia