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With greater and greater counts of high-speed and differential pair signals in designs, the ability to control the areas around these nets becomes more important. Adjusting and maintaining the distance to these nets on the same layer as the routing is easily managed in just about any EDA tool out there. But, when it comes to inter-layer distancing, such as removing power and ground plane shapes from above or below your differential pairs, the tools can vary significantly.
Today, we’re going to discuss just some of the options available in the Allegro Package Designer tool. These aren’t all the commands at your disposal – the Allegro platform is very flexible and frequently provides multiple ways to achieve your results. We encourage you to use the one that fits best into your flow; and, think creatively. Tomorrow’s problems may be different than yesterday’s. Adapting and evolving are core tenets of this exciting industry!
I begin with the most integrated solutions. It exists because this is likely THE most common requirement. Ensuring that power and ground planes are cut out underneath the bottom and above the bottom of your high-speed signal nets is a practice many of you use today.
Allegro manages this by allowing you to define a route keepout shape directly in the padstack definition, as shown below.
This pad can be sized to create the exact keepout area that you need cut from any shape on layers that the via is NOT spanning. Defining geometry is the first step. After this is complete, move into the layout database itself. How many layers the RKO shield needs to extend may vary from instance to instance or from design to design. Even the direction – above the via or below – may vary from one to another.
Thusly, Allegro Package Designer asks that you use the Edit - Properties command and assign one of two simple properties to all the pins, vias, even bond fingers, which need these keepouts added. I recommend leveraging the Find by Query tool to identify all the padstacks based on the considerations driving the keepout stacks. This helps to ensure you don’t miss anyone because of something like a visibility setting.
Once selected, in the Edit Properties command, assign a value for the ADJACENT_LAYER_KEEPOUT_BELOW or ADJACENT_LAYER_KEEPOUT_ABOVE attribute. This is a number that tells the tool how many layers in that direction to apply the keepout. As soon as you enter these values, you’ll see the immediate impact on the layout.
These attributes provide a clean, elegant solution for the most common adjacent-layer voiding. The RKOs (and associated voids) adjust automatically as you push and shove the vias around the design, leaving you no cleanup work to do.
BUT, they don’t give you complete control. These keepouts are, obviously, only able to be applied to padstack-based design elements. It’s not possible to use them to void out underneath other objects like routing traces, teardrops/fillets, or shapes. Cadence has provided you with the tools for that, also.
Our second command for discussion today can be found in the Shape menu as Shape - Void Adjacent Layer Shapes. Whereas the adjacent layer keepouts described above work only with padstack objects, the voids created by this command can be applied based on any routing object in the design.
With this tool, you pick the objects that you want to create voids for (the layers that these items are on show as blue in the grid shown above to help you verify your selections). You can then provide the clearance, or expansion, for the voids created on any layers.
Each layer’s voids can be sized differently if you need to grow or shrink the clearance as you move away from the reference object. Equally important, when you create all these voids, you may need to merge nearby voids together to get the cleanest results in terms of manufacturing and signal integrity.
Flipping to the second page of the table allows you to specify when to merge nearby shapes and what the combined outline should look like. The merging is done using a rubber band type strategy called a convex hull. This extends edges until they meet so that you get a clean outline (you have doubtless seen similar using the bond finger soldermask generator and other tools).
The downside or trade-off, if you will, with this command versus the padstack-embedded keepouts is that these voids are not tightly coupled to the source objects. If you void above and below a critical signal cline that you then reroute, you will need to come back and re-run the tool to update the adjacent layer voids.
It is not only the need to ADD voids strategically around critical signals that give us problems. Oftentimes, we don’t want those same signals to cross the edges of the plane shapes. Instead, we want them to ALWAYS be shielded by the ground plane, for instance.
When you are designing any substrate with metal density requirements and the need for degassing, then, it is likely that degassing holes on those layers above and below your diff pair will be a problem. To prevent this, the solution is simple – tell the tool not to add degassing holes relative to these traces!
Yes, it really is that simple. Select the clines, vias, even shapes, that you want to prevent degassing holes from being placed above or below and add the DEGAS_NO_VOID property. When this is done, as the layers are degassed, these items are treated as degassing keepout areas.
Below, I’ve added the property to the clines of the two diff pair routes. The degassing pattern now understands to filter out holes that would interfere with the signal integrity of these nets.
The top net, however, is unaffected. Not being a critical signal, it can withstand that interference, so we can add the degassing holes to lower the metal density on this layer.
Whenever you change the routing, regenerating the degassing hole patterns will reapply the modified implied keepouts, making sure that your high-speed signals are always ideally shielded. And, if you were wondering, YES you can place this property on a net to keep degassing holes from every running adjacent to any etch elements of the net. Handy!
We’ve only covered three items today. There are many others, whether it’s the Place - Via Array command, building return path vias into your high-speed routing structures, or even the most flexible manner at all… manual void creation. Just kidding! Hopefully, you never have to do that!
Do you have another strategy for protecting your most important nets? Do you have ideas for how to make any of the myriad Cadence flows even better? Be sure to share with us to help make your layout design environment better than ever!