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Welcome to 2020, everyone! Happy New Year! With the start of a new year, many of us make goals to improve on things we think we can be better at. Whether it’s cutting back on sweet desserts (I should!), getting on the treadmill (*sigh*), or taking a vacation somewhere exciting, we all have things we want to do.
Designing a package substrate, there are things that many of us do that perhaps we should think twice about. One of those being using a multi-layer padstack for the pins of flip-chip dies. I understand the attractiveness of doing this, but if you’ll give me just a few moments, perhaps I can convince you to put breaking this habit on your resolutions list this year.
A flip-chip is a die. That die’s pins have bumps, pillars, or some other metal added to them that will then get affixed to the package substrate somewhere. Typically, that’s the top or bottom metal layers, but it could be on top of another die in a die stack, in a closed/open cavity, or on an interposer.
The key being that the component itself has those attachment bumps already on it when it comes to you for assembly. No matter how hard you push on it when you mount it to the package, those bumps aren’t going to dig down through the laminate layers of the package.
The pins can be placed on top of vias which connect to objects on other layers, but the pins themselves cannot do so. At the most creative, you could use pillars and align those pillars with drill holes of vias in the package. It is not the pins that transition to the other layers, it is the via’s drill hole.
Use a single-layer pad which represents the connect pad on the package substrate. This will reflect the metal on the package substrate where the die needs to contact. If you need to add CTE (coefficient of thermal expansion) compensation, the pads on the package are all that are impacted, meaning that a combined database with die and package will have all items in the proper relative locations, too.
This is related to the first concern. If you define your die pad with an embedded via drill for mounting on the top of the package, what happens when you eventually mount that component into an open cavity in the substrate? Or, for that matter, on top of another die in a die stack?
Odds are very good that in both scenarios, the “via” needs to change. It’s not going to be a through-hole down to the bottom of the package any longer for an embedded component, and it certainly isn’t going to act as a through-silicon via through the die below it in a stack.
Instead, if you use a single layer pad for the pins, you can add vias with a couple of commands like the offset via generator and set the end layer based on where the component is mounted. If you still want those vias to move with the component as you move it around, you can associate the vias with the die’s symbol. They will all move together with no risk of the vias becoming misaligned from the pins at any time.
The next main reason that I see for designers is using a two-layer padstack, with one pad representing the die side of the bump and the other the package side landing pad. The “drill” between these layers is then used to represent the bump object itself.
“What is the harm in this?” I hear you ask! To start with, bumps are not the same width from top to bottom. During the mounting process, they will get flattened at least slightly, leaving the middle wider than the top and bottom – kind of like me after all those desserts. The drill hole, then, is not an accurate description of the bump, whereas the bump parameters defined in the layout, shown below, provide a much better description.
The other item to consider is that, because of these more accurate models stored in the design, the drill information won’t be referenced by the analysis tools, the 3D display, the die stack editor, or any other tools. In truth, the only thing that will use those artificial drill holes from DIE1 to TOP maybe your own custom developed code.
Rather than do this, if you need to access the bump geometries, contact your local field AE for help extracting the details with SKILL. In this way, as more detailed models for different connection types are added to the tool, such as with pillars, you will be able to easily add handling into your own code.
Our fourth and final reason has to do with the package layer stack-up. If you start with a two-layer laminate substrate but end up changing to a three- or even four-layer cross-section in order to get everything routed, adding those layers will almost certainly mean adjustments to the drill span layers for your die component.
If you have built this into your pin padstacks themselves, you may find that, now, some need to go to layer 2, some to layer 3, and others to layer 4. But to achieve this, you must now change sets of padstacks to different pins, adjust those new padstacks’ layers, and slowly correct your design.
Instead, had you used vias (or via structures) for the layer changes, you can swap the via structures to new ones with the adjusted target layer quickly and easily by leveraging tools like Find by Query. And, if you have multiple instances of the die – meaning each one may need different spans – then they can each be changed. You don’t need to create separate symbol definitions for each die. When the dies themselves are the same manufactured part, you want to avoid this so that your bill of materials and other documentation and manufacturing reports remain correct.
Do those reasons resonate with you? Can you see how using a single layer for the pins plus a via to the correct layer will reflect the finished design better, allow for improved SI extraction and modeling, more accurate 3D rendering of the layout, and more? I hope so!
Our goal is always to make your design work as simple as possible. In doing that, we cannot sacrifice the accuracy of the assembly process or connectivity. By following these best practices, you’ll be assured the best chance of successful design flow with minimal errors and re-spins. Should you need a different type of connector than a bump or pillar description, let your customer support AE know, so that we can look at extending the tool to support it.