IC Packaging and SiP Blogs

We’ve covered all the different types of die components and how they interface with the package substrate coming into Allegro Package Designer. But, the package component (whether it’s a BGA, LGA, lead frame, or something else) is destined to mount onto a board eventually, in almost all cases.

With that in mind, what differences are there when you are done with your package layout duties and want to proudly hand off your work for use by your PCB designer friends? Or, how can you generate a component that they can place early on, based on your initial work, in order to provide feedback to you on things they need to be changed?

Allegro Package Designer has been designed to try and keep things as consistent as possible. For that very reason, you’ll see distinct similarities between the exported library element for the package and the input flip-chips – normally what the BGA most closely resembles.

From which pads of the package are of interest on the PCB surface to the default library symbol orientation, let’s see where the differences are, why they are there, and how to make communication with your downstream board design customers as efficient as possible.

The Board Level Component Interface

The board-level component generator in Allegro Package Designer is specially designed to create all the library elements needed for using your package on another substrate (typically a board, but yes, it could also be an interposer or another package!).

A logical interface is required; the output format allows you to select between either of the HDL or SCALD types. The library destination provides the folder where files will be placed (use the flattened option to place all the various files, like chips.prt, into this folder rather than subfolders).

Finally, you may choose to export either – or both – delay report options. Both provide the same delay information, though one is given in time, the other in length. It is a wise idea not to neglect the delay report outputs. These generate files compatible with the Allegro PCB Editor’s File - Import - Pin Delay interface.

When you apply the delay report values to the component at the PCB level, you provide an extra level of detail so that the PCB designer knows exactly what delays he is trying to match to. The file will automatically skip and power/ground net pins (make sure you flag your voltage nets!), leaving only the signal pins.

After running the command, you have all the puzzle pieces that your PCB colleague requires. Shown below, you have the front-end schematic files, the logical device file, physical symbol library elements (DRA, PSM, PAD), and the delay reports. All good to go!

Choosing the Right Padstack

When you press okay in the Component Options screen shown above, you’re presented with an option to select the padstack to use for the BGA balls on the board design:

The BGA in your Allegro Package Designer design already has a padstack. So, why are you being advised to select one here? Think back to the flip-chip being placed on your package. The landing pads on the top package substrate layer are what you, as the package layout engineer, need for reference. The same is true for the PCB designer. In Allegro PCB, the pad that you see for the BGA is the landing target for the solder ball.

This consistency is a critical component of the end-to-end Cadence layout flow. Using consistent interface points across all the tools allows your expanded team to speak to each other in a common language.

And, with the BGA, the ball pads on the bottom layer of your design (where the balls will be initially soldered) are often not only a different size and shape from the PCB landing pads, they are even on different layers! The default pad layer for your BGA when mounted onto the PCB should be the top surface, not the bottom, as it was in the package.

You will, however, note that the BGA pin pattern created by the board level component command is NOT mirrored. As above, this is important. The package is designed with the dies at the top and balls at the bottom, meaning it is already in the orientation that it should be referenced by for placement on the PCB top surface. If you chose to design your package from the chip-up perspective, then the BGA component has its geometry mirrored in the MCM database, and thus the PCB level symbol, while mirrored relative to the view you see in the package layout, is consistent with the definition for the ball pattern.

All this to illustrate why, when picking the padstack to use for the BGA balls, you should pick the appropriate library padstack from the PCB engineer’s pad library. With SMD pads on the top surface and size/geometry representing the connecting pad needed for the ball to be mounted to, this pad choice ensures a solid, proper mounting when the PCB is assembled.

Additional Supporting Data

The board-level component interface provides all the required pieces of data for a board designer to use your completed package. There are other pieces of data that will make the picture still clearer if you want. These are some of the other data files and how to generate them that might prove valuable, though not required:

• STEP model of the package
  File - Export in the 3D Canvas window; select the STEP file type option.

• Ball map spreadsheet
  File - Export  - Symbol Spreadsheet in the main Allegro Package Designer canvas window; select the BGA component when prompted.

• BGA text file
  File - Export  - BGA Text-Out Wizard in the main Allegro Package Designer canvas window; select the BGA component when prompted (if you have more than one BGA).

Should there be other data points not listed above that your PCB compatriot requests, there is probably a way to generate them from the tool. Reports are under the Reports menu, for instance. If you cannot find what you are looking for, reach out to us so that we can guide you to appropriate menu entry.