IC Packagers: The Spaces Between Your Dies

Die stacks are starting to look more like skyscrapers every year. If your packages involved vertical stacks of components of any kind, then you know there is more involved in stacking your dies than just the components themselves. What about interposers and spacers?

While interposers provide a means of routing redistribution, letting you reconfigure a pin pattern for optimal bonding down to the substrate, for instance, a spacer serves other purposes. These symbols (and they are just symbols; a spacer has no associated component, no active circuitry, no routing; it is, at its simplest, just a block of selected material) provide the glue that holds your stack together. They add height between components to keep your bond wires from being crushed when the next die is mounted to the stack and can offer the adhesive that will wed those two components permanently together.

Cadence tools offer you a pair of ways to quickly and easily define spacers in your die stack. Which you use will depend upon the complexity of the spacer, what it is used for, and what you want to see in your cross-section.

Implicit Adhesive Spacers Built into Die Components

A spacer primarily used to adhere a wire bond die to the object below it will often be sized approximately the same as the die. If that’s the case in your scenario, you may want to leverage the option within Die-Stack Editor to define a dielectric material and thickness associated with the upper die.

In the image above, DIE1 has been assigned an adhesive epoxy dielectric material with a 25-micron thickness. When defined in this manner, the spacer is built directly into the die object. It does not have a separate outline, it will move automatically with the die as you move it in the XY plane (or change its layer/die stack position). This can make managing the spacer more natural. You do not need to specify a named dielectric layer for the spacer to reside on in this case. Because it is a derived piece of the die, not a separate element, it will be resized if the die size changes with an ECO. Artwork generation will reference the die’s outline, as the spacer’s size is the same.

However, you will still have the spacer’s thickness included in the die stack’s overall height. It will be translated to the Sigrity environment when it is time to analyze your design.

Explicit Spacers on Named Dielectric Layers

If your spacer’s size doesn’t match the die above it, is made of more than one material, or is more complex in shape; you can define the exact geometry using the add spacer command coupled with the shape edit application mode tools.

Because this is an explicit spacer, it needs to be placed on a layer. A named dielectric layer in the die stack region of your design provides the destination. To accommodate multiple die stacks, the spacer’s material and thickness is stored directly on it. The cross-section layers provide order only for die stacks.

Use the Add – Spacer command, the UI for which is shown below:

You still have the option of creating a starting size and outline relative to a die’s size if you want, but you will provide a symbol name and part number (which can go into your bill of materials), as well as the material name and thickness. The layer gives the order in the die stack.

After you place the spacer, which begins life as a rectangle, you can modify it however you like. Use the shape edit application mode to chamfer or round corners. Expand the spacer to allow multiple die components to sit on top of the single spacer. If you have the need, stack one spacer (probably with a different material!) on top of the first one.

Beyond the Basics

Many spacers are simple rectangles. But, they do not need to be. Model them accurately for better analysis results, correct 3D bond wire clearance DRCs, and more.

Take my example above. Here, you’ll see that I have a large die on the bottom with a smaller die in the middle. Between the two of them, I’ve added a spacer. However, in this case, the spacer I made has a hole in it to fit the smaller die inside of it. SiP Layout’s die stack editor tool is smart. It realizes that the small die doesn’t overlap the spacer at all. So, the die doesn’t sit on top of the spacer; rather, it sits on the die below it.

With a thickness set just slightly higher than the inner die’s thickness, I can use the donut-shaped spacer as the support to sit another die above this small flip-chip, surrounding and protecting it. The 3D view on the right shows how this looks as a final assembled part.

If you’re new to using spacers in your die stacks, hopefully, we’ve shown just how easy it is. Add them to your next design to get a better analysis of your package!