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With each new generation, demand for smaller, faster, lighter, more efficient is at the top of the requirements list for most things. But, we cannot make things smaller forever. Instead, we need to look for more creative solutions. Where can we turn?
Customer requests have told us that one direction more of you are turning to is two-sided dies. That is why, with the 17.2 release, the SiP layout tool was updated to support all manner of these types of components across the spectrum of the tool – whether it is in the die stack editor command, the symbol editing application mode, or even the die text and co-design die XDA file formats.
The most common component that I see involves wire bond pads on the top (front) of the die with micro bumps on the back. While there are many other possible arrangements, even a mixture of pad types on the same side of the die, for our examples today, we’ll consider this situation.
One-sided or two-sided, any die starts from the same place: your local IC design team. How they provide you with the top-level pad information may vary, but regardless of the source, you can bring things in to define a two-sided component with the same formats and ease as a traditional die.
If you happen to be exercising a co-design flow, working directly with your IC design team closely and exchanging updates via the XDA file format, your flow is as easy as can be. The XDA format, by virtue of its specific application to convey die information, has built-in tags for identifying that the die has backside pins. Your flow does not need to change at all.
The other most common format, die text in, takes only a small amount of additional work. This file format, which is shared between dies and BGAs alike, will require you to have one new column. This column tells the system where the pads are, the front or back side.
In the above example, you can see the Pad Layer column. When the pin’s entry in this column is blank, the pin is assumed to be on the front side (this keeps things simple for the most typical standard die setups). You can also specifically enter a 0 or “FRONT_SIDE”. For pins on the back, this value can be either 1 or “BACK_SIDE” to indicate the pin is on the back (layer offset of one). The Pad Type column allows you to indicate how the pad will be connected off the chip. The default will be driven by the chip attachment type on the final page of the form, but you can override specific pads here. In my examples, I have a wire bond die and I’ve identified these four pins shown as being back-side, micro-bumped pads. Not too difficult!
It can be easy to confuse a two-sided die component with two different one-sided dies of different type stacked on top of each other, visually. In the main 2D display, there is no difference in how a single layer looks, after all, since the pads are each still only on one layer. Things become clearer in the die stack editor, as we see below:
Here, you can see that not only does the die have a front pad layer, but it also has a back pad layer. This layer is calculated automatically based on the orientation of the component, the pad types, etc. If you need to do so, you can manually change individual pins using the symbol edit application mode (more on that later). When you change the front layer for the die in this form, or if you change the layer the die stack itself sits on, the back layer will be updated for you. Small bonus – you can see in the graphic display of the die stack that the die has both wires above and bumps below.
Things become far clearer when looking at the die in the 3D viewer. As you can see in the simple view above, the wires come off the top side of the die and connect to fingers to the left, while the four micro-bumped pins I added in the die text file are visible under the die.
Since bump height contributes to the overall height of the die (and stack), they are referenced in all the interfaces to ensure that the die is placed accurately in the Z-axis. This is critical for accurate analysis and manufacturing/assembly processes.
We’ve covered the importing of an existing die and what it looks like in the different graphical views found within SiP Layout. But, what if you need to edit one of these dies? How about if you want to build one from scratch as an early prototype for feasibility studies?
Situations like this are best tackled with the symbol edit application mode. Unlike the library DRA symbol editing environment, the application mode allows you to see the symbol in the context of the rest of the package (particularly if you have additional dies in the stack, some preliminary routing, a BGA ball pattern, or other information available).
Most commands in the application mode will function the same. Where things differ is when you are adding or modifying pins. The add pin command’s interface, shown below, will let you define the pad type, padstack, and pad layer.
We mentioned earlier that all pins of a component do not always have the same attachment method. The default will create pins on the front side of the die. Change the layer (this will list all legal layers for front or back side pins of this die), the padstack (if it is different), and the pad type. Types include not just bond pads and bumps, but also copper pillars, connect/landing pads, no connect pads, and probe pads.
The first time you add back-side pins to the component (or when you delete the last one), you’ll see things update in the die stack editor and other views to account for the change in overall height and thickness. When you export the die to a text file or other format, you’ll see the information there, as well.
That’s all there is to it! If you have been wondering how to design substrates with these kinds of dies, hopefully, this has been helpful. Using them is no more difficult than any other component!