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In its 10th year now, ARM TechCon is in full swing this week at the Santa Clara Convention Center. Being an engineer in a specialized field, it is sometimes difficult for me to explain to family and friends what I actually do. I have used several analogies from different perspectives in the past, as they can be seen from a mountain to house re-modeling, for which one can use abstract models.
Well, courtesy of one of our customers, NVIDIA, I have a new way of explaining what I do in my day job. My team and I are helping to make the future the present! In this cool video, "The Journey of Maxwell". About 52 seconds in, the Palladium platform is featured quite prominently.
The commentators' overlay is very insightful, and I will use it going forward to explain what Cadence does (and yes, the music helps ...):
"The proving ground is a room full of hardware emulators the size of refrigerators ... ... these machines simulate how the GPU will perform in the real world ... ... giving engineers the insight to perfect every element before taking it to silicon ... ... concepts are tested, refined and tested again ... ... technologies are invented and perfected ... ... the future becomes the present!"
We simply allow our users to get a glimpse at the future using tools to represent the chip as it will be when it comes back. They can test concepts, refine them, and test them again to make the end product meet the spec perfectly.
Back to ARM TechCon. I will be there for a presentation together with Rob Kaye from ARM at 11:30am on Friday in Room G. We will be presenting on Reducing Time to Point of Interest with Accelerated OS Boot. This will introduce users to the Cadence Palladium Hybrid Solution with VSP virtual prototyping and ARM Fast Models. Rob and I will talk about a new metric that is emerging - the "time to point of interest" at which a problem occurs. Billions of cycles of an operating system (OS) have to be executed before software-based diagnostics can start; therefore, OS boot itself becomes the bottleneck.
NVIDIA has been very active in promoting their application of this use model in presentations like Palladium for Android SW Validation, GPU Testing on ARM v8 SoC at DAC in San Francisco earlier this year. This time ARM will present their own results as well. As announced this Wednesday, ARM saw in their own work on an ARM MaliTM-T760 GPU design together with ARM Fast Models representing the processor sub-system, an overall speedup of test of up to 10X. And they got up to 50X accelerated OS boot, which brought them to the point of interest much faster than in pure emulation.
In the actual ARM example using a MALITM-T760 design, the items that ARM was interested in include wall clock time for the actual Linux boot, the driver loading and setup, the time to benchmark execution for the 1st frame, and the benchmark execution for all frames. The results were interesting and explain the introduction of this new metric, the "time to point of interest". Compared to pure emulation, the actual Linux boot was 67X faster, driver loading was 408X faster. In terms of wall time, the turnaround time up to and including the first frame, was 70X faster, and the turnaround time for the complete tests (involving a varying number of frames) was 19X faster.
So far in all cases we have seen, including in our work with ARM, the actual tests after OS boot are not quite as much accelerated as the OS boot itself. The time to point of interest can be accelerated significantly because during OS boot, the interaction between the TLM simulation and RTL execution in emulation (which limits the speed) is fairly limited. When the actual tests run after the OS is booted, the speed up depends again on how many interactions and synchronizations are necessary between the two domains. We have introduced some specific smart memory technology in the Cadence Palladium Hybrid solution with VSP and ARM Fast Models, allowing synchronization between both domains to be more effective (think of it as an advanced form of caching). Still, tests get accelerated the most when they execute a fair share of functionality in software.
Rob Kaye and I are looking forward to seeing you at ARM TechCon at 11:30am this Friday in Room G to discuss more details. Again, the title of our presentation is "Reducing Time to Point of Interest with Accelerated OS Boot".