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A little bit of everything in the blog today:
As someone that was involved with UVM and PSS, both becoming Accellera standards, it is exciting to see both growing independently and together. With PSS we had a massive amount of papers and interest at CDN-live Israel, CDN-live India, DVCON India, DVCON Europe, HVS IBM and more. In many of these conferences the PSS papers were interesting enough to win the best-paper award, and we appreciate the help of the users who stepped up to tell others on their PSS findings.
In the attached video, Liran Kosovizer from TI share his Perspec PSS experience. TI’s paper on this won the best-paper award at DVCON Europe.
To see Liran’s video click the following link: https://www.youtube.com/watch?v=cvvq4HMKn18&feature=youtu.be
For those who missed the previous blogs, Cadence released an open library and methodology to help the industry adopt the PSS paradigm. It comprises golden-examples, modeling patterns and a generic library. These are educational for new PSS users, and provide automation and reuse for the experienced ones. The PSM package can be downloaded by anyone, users and vendors alike, by sending an email to firstname.lastname@example.org.
Among other things, the PSM update release includes:
1) Pad-configuration modeling pattern
New modeling pattern, illustrating a PSS modeling for the common challenge of IO pads configuration in an SoC.
2) YAMM golden example:
Enhanced PSS/C++ implementation, also showing configuration in pure C++ code.
3) Exhaustive-Exercise-of-Power-States pattern:
Enhanced PSS/C++ implementation, with and the generated C test can executable in plain-Linux mode.
Cadence users can download the PSM package at http://downloads.cadence.com/. Others please send an email to email@example.com
We already started the work on the next release and exciting things are coming …