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Here we conclude the blog series and highlight the results of Mediatek's use of Cadence Perspec™ System Verifier for their SoC level verification. In case you missed it, Part 1 of the blog is here, and Part 2 of the blog is here.
One of their key objectives was increasing productivity producing mixed directed-random tests. Here in Figure 9 you can see how Mediatek has ordered a series of actions in a directed fashion, each of those actions is randomized for coverage.
Figure 9: Mediatek Mixed Directed-Random Test Specification
To develop their Perspec model, Mediatek followed the methodology highlighted in Figure 10. This specifically calls out two roles that are seen in multiple customers: the modeler and the test writer. The modeler is an expert on the overall system, resources and their relationships, and Perspec modeling. Their responsibility is to develop the model faithfully for the system and the projects verification goals. While also considering reuse of the model for future derivative or SoC family projects. The test writer is an expert on the verification plan for the project, and is responsible for creating the suite of tests. Larger projects have a few modelers and many test writers.
Figure 10: Mediatek Model Development Flow
The KPI results of applying Perspec to the Mediatek project are positive across the board. Figure 11 shows the coverage improvements, efficiency gains, and some verification failures indentifying hardware/software integration bugs. The KPI not covered in th echart is a reduction in the debugging time.
Figure 11: Mediatek Deployment Metrics and Benefits of Using Perspec System Verifier
The overall benefits, including improvement in debugging, are highlighted in Figure 12. One note they verbalized is in reference to the 61% code coverage. This number is across the SoC, whereas the areas they applied Perspec reach 95%.
Now that they have achieved these initial goals, focusing on the CPU subsystem, Mediatek is expanding Perspec application to use cases beyond. Including all the myriad low power management modes and functionality.
Figure 12: Perspec System Verifier Key Benefits Summary
For more information, visit the Perspec product page.