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CTKao
CTKao
11 May 2020
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Challenges of On-Chip Thermal Analysis in Electronic System Designs

In the beginning of our universe, enormous amount of heat or energy was generated and released during the period of 0 to 10-43 sec, in theory while backed up by models and measurements, about 13.8 billion years ago.  Since then, a variety of physical mechanisms keep transforming the energy into other forms or converting it back as heat, including the nuclear fusion in our sun and the self-heating within the tiny transistors on the computer chips in our electronic devices.  For every system to function well, no matter it is a live organism like a virus or a man-made device like a smart phone, the operational temperature range will be one of the most essential factors directly related to the system agility.  Consequently, thermal analysis that can reveal temperature information or distribution within the system under various desired conditions of energy input and output would be among the core elements to ensure the operation and performance of the system.

The on-chip thermal analysis has been weighed among developers as one of the critical requirements for electronic system designs.  In essence, thermal transport is a diffusion process, which is different from electric transport in circuits.  Electrical currents are flowing through electrically conductive paths, and the relevant electrical characteristics are mostly limited to the conductive paths (metals).  Dielectric materials usually come into the picture in the assessment of electromagnetic interaction and dielectric breakdown under large electrical potential differences.  On the other hand, heat will diffuse through all materials in the system, although heat conduction is typically much more effective in metals than in dielectrics.  This is the main reason that for a system-level heat transfer analysis, all materials physically existing in a system should be included.  In addition to the fact that thermal transport has a nature of involving both metals and dielectrics, several aspects associated with the importance and challenges of on-chip thermal analysis are detailed below:

  • Actual power profiling on chip – power profiling on chip will be the necessary information for thermal analysis since it represents the heat generation or input to the system. Nowadays a complex IC chip could contain multiple IP blocks responsible various functions, and each block may generate different power values as needed.  Without detailed and accurate power distribution on chip as input conditions, the thermal analysis and temperature resolution would be lack of applicability and practicality.

      

        Chip design                            Chip power profiling           System thermal analysis

  •  Transient electrical-thermal co-simulation– as mentioned above, modern electronic devices generally accommodate multi-blocks to carry out multi-tasks on chips, not only in an equilibrium or a steady state, but also in a transient state including switching operations for executing multiple tasks. Allowable temperature criteria based on steady-state thermal analysis alone would not be sufficient for design optimization because those criteria could introduce excessive constraints in power consumption that might not be realistic in actual applications involving transient operations.  Additionally, the Joule heating in the circuit should be included in thermal analysis since it contributes to extra heat sources.  The resulting elevated temperature would modify the electrical resistance and further augment the Joule heating effect, which could result in the adverse phenomenon of “thermal runaway” and even cause system failure.

             System-level transient thermal analysis: temperature distribution as time marching

  • Environmental effects including package, PCB, and system – Like electricity, heat generated or input in a system will seek for the least resistant path to flow through and out of the system to environment. Traditional thermal analysis on chip usually would not consider the out-of-chip paths of thermal transport mainly because 1) the granularity of on-chip analysis may not be easily implemented on the components outside the chip, and 2) the detailed configurations of the components outside the chip usually would not be readily available.  However, thermal analysis of a “closed system” will just not be able to satisfy the design requirements of ever-advancing electronic systems.

System configuration           Temperature distribution              Velocity streamlines

  • Heterogeneous packaging (3DIC configuration) – As the Moore’s law approaching the physical limit of the critical size on chip, designers are now focusing on building devices in the 3rd dimension, namely, out of the plane where the chip sits. For example, one heterogeneous packaging structure could include multiple chips being placed on a common silicon interposer, which is a representative 3DIC configurations currently the advanced IC chip designers are working on.  Not only is the 3DIC design challenging in integrating multiple heterogeneous components on one substrate, but the heterogeneous design is also highly dependent on the thermal behavior and temperature distribution among those components having various power sources to achieve the desirable performance with optimization.

    Heterogeneous packaging structure             Exemplary temperature profile

Celsius Thermal Solver was developed aiming to respond those challenges.  To precisely obtain the power profiling on chips, Celsius can connect with the thermal model generated by Voltus based on the proven power analysis technology widely adopted by IC designers.  The Voltus thermal models contain necessary physical parameters including detailed power distribution, material properties, and metal density information at different layers inside the chip.  The power distribution can be in both steady and transient states for subsequent electrical-thermal co-simulation.  Celsius can also incorporate detailed or simplified models for the package, PCB, and enclosure designs of the system to ensure the heat transfer from the chips to the environment is adequately considered.  In particular, the Computational Fluid Dynamics (CFD) module is integrated with the Finite-Element-Analysis (FEA) module on a common platform to provide a complete approach for system-level thermal problems.  Combining its unique features and readily integration with existing Cadence tools, Celsius Thermal Solver clearly would provide the holistic solution to address the on-chip thermal challenges in electronic system designs.

Tags:
  • Celsius Thermal Solver |
  • IC Package |
  • system analysis |
  • EE Thermal |
  • temperature |
  • power integrity |
  • 3D analysis |
  • Voltus |
  • Heat transfer |
  • electrical-thermal co-simulation |
  • thermal |
  • heterogenous integration |