How to Tailor Your PCB and IC Package Modeling With "Cut and Stitch" to Generate Great Models 10 Times Faster

As an experienced SI expert, you likely apply multiple solvers and simulators to accomplish your high-speed design tasks; from abstract circuit simulation to detailed 3D EM analysis. And quite often, you lean towards applying the most detailed and computationally expensive tool to get the most accurate results possible. The downside is, it takes you significant time to run these tools. And even worse, you may get bad results due to problems with your tool setup.  Unfortunately, this only comes after hours or even days of waiting for the results.  All the time you spent waiting was totally wasted. How frustrating!

But - why endure such frustration and only hope that it will never happen again… when you actually have another way out?

Cut and Stitch

Brad Brim, DesignCon resident expert on signal and power integrity applications for packages and boards, used to be one of you. He experienced this frustration early in his career, then used his experience to avoid the problem most of the time, but even as an experienced 3D expert, fell prey to the problem now and then.  It is because of this he developed a new methodology that utilizes a mixed solver simulation flow along with a "cut and stitch" approach to get great results quickly, the first time, and every time.

The "cut-and-stitch" flow requires a polygon boundary to define the area for local 3D simulation. This region is then partitioned into “zones” by simply drawing cut lines. The individual 3D simulation results for each zone are combined for a composite result. Though it’s applied much less often than it could (or should) be, there’s an option to uniquely select either the 3D solver or hybrid solver for each zone. (demonstrated left)

 Another convenience of the "cut-and-stitch" simulation flow is that it driven from a single user interface that enables application of multiple field solvers in an automated manner. It provides significant time and memory savings and helps to assure accurate results with a minimum of engineering time invested.

Another part of the methodology developed by Brad Brim includes use of different field solvers to qualify your “area of interest” so that 3D full-wave analysis time is not wasted on excess design data.  This methodology has the ability to produce an accurate interconnect model in a fraction of the time spent using other solutions where the problem may not have been so strategically bounded.

He maps out six steps of a mixed solver "Cut and Stitch" simulation flow (see below left), and highly encourages you not to skip the initial two hybrid solver steps. Because for even the most experienced analyst, these two initial steps are a minimal time investment (6 min + 20 sec) for assured success, efficiency and insight to design performance.  He then continues on to guide you to be even more successful with the mixed-solver cut-and-stitch flow. In the demo case, the hybrid solver results show that the board-side transition is seen to dominate circuit response. This information guided him to select only that zone for 3D full-wave simulation. (see below right)

The 13 minute cut-and-stitch simulation of Step 4 provides accurate results for this SerDes channel. Brad Brim goes on to validate the methodology versus an all-3D cut-and-stitch simulation and a full 3D simulation of the full (cut) design (Step 6). As you can see below, the results have very reasonable correlation: (click to enlarge)

In the end, Brad Brim concludes that "the question is not whether to apply 3D EM or hybrid solver technology, but rather how to best apply 3D EM and hybrid solver technologies."

Brad Brim's Demonstration Video

You might also be interested in the "Cut and Stitch" demo below:

Feel free to leave comments here, we are open to all kinds of discussions.

(Tool demonstrated is from Allegro^® Sigrity^™ SI Base and the Allegro^® Sigrity^™ System Serial Link Analysis Option)