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Whiteboard Wednesdays
memory subsystems
memory IP
DDR IP
DDR PHY

Whiteboard Wednesdays - Application-Optimized DDR PHYs

30 Aug 2016 • Less than one minute read
In this week's Whiteboard Wednesdays video, Kishore Kasamsetty takes a closer look at how designers continue to get more out of memory subsystems. The traditional one-size-fits-all DDR PHY no longer works. Increasingly, DDR PHYs need to be configured such that they can support unique requirements for a particular application space. This video outlines application-specific DDR PHY from Cadence that offer benefits of optimized power, performance, and area while addressing unique requirements of a targeted application space. 
For more information please visit the DDR PHY IP site. 

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